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ADC3910D125: Test pattern SPI command examples

Part Number: ADC3910D125


Tool/software:

Are there any examples of the SPI register setting combinations needed to generate the different test patterns?  I cannot seem to get the right combination of settings to get the patterns I want to come out, such as the simple ramp.  Many of the combinations I've tried just output a constant value of 0x300 on the 12 bit output bus.

  • Hi Glen,

    This is the sequence of reg writes you will need to perform to enable the ramp pattern mode:

    1. Select output data from digital block:
      Set DIG_DATA in Reg 0x89 to 1
    2. Enable DCLK DLL since we are using digital blocks:
      set DCLK_DLL in Reg 0x8F to 1
    3. Ungate the Clk to the digital blocks
      set CLK_GBL in Reg 0x484 to 1
    4. Enable the Clk to the digital blocks
      set CLK_OUT in Reg 0x4BF to 3
    5. Set the digital test pattern mode to ramp for CHA
      set DIG_PATTERN_MODE_CHA in Reg 0xA1 to 1
    6. Set the digital test pattern mode to ramp for CHB
      set DIG_PATTERN_MODE_CHB in Reg 0xA1 to 1
    7. Enable digital test pattern
      set DIG_PAT_ENABLE in Reg 0xA6 to 1

    If you are using the ADC3910D125EVM_API_Rev0.1 software package, you can add the following lines in the .py script after reset():

    Read_modify_write(0x89, 5, 1, 0x1)  # Selects data from digital instead of analog.
    Read_modify_write(0x8F, 4, 1, 0x1)  # Needed when using digital features.
    Read_modify_write(0x484, 1, 1, 0x1) # Enable clock to digital.
    Read_modify_write(0x4BF, 0, 2, 0x3) # Enable clock to digital data output block.
    Read_modify_write(0xA1, 3, 3, 0x1)    # Enable Ramp test pattern mode for CHA
    Read_modify_write(0xA1, 0, 3, 0x1)    # Enable Ramp test pattern mode for CHB
    Read_modify_write(0xA6, 0, 1, 0x1)  # Enable digital test pattern.
    If you need any other test pattern mode, you can use the same sequence, but setyour desired test patternmode using register 0xA1, and program a custom pattern with registers 0xA2 and 0xA3 for channel A and 0xA4 and 0xA5 for channel B.
    Best,
    Luke Allen
  • Thanks Luke for the prompt reply.  That did the trick.  I had missed the global clock enable on 0x484.

    We never got the EV board, so I wasn't aware of the supporting software package, but I can see that there are some good examples in the Python code, so thank you for referring me to that too.