Tool/software:
On the ADC3910D125EVM schematic page 4 there is a PIN CONTROL circuit that pulls SEN/M0, SCLK/M1 and SDIO/M2 down (as well as the OEN line). And there is the J5 header, perhaps to allow the option to pull any of these lines high? The user guide the evaluation board makes no mention of this other than to say to leave J5 jumpers uninstalled. The M0..M2 names and the pulldowns imply that there might be some kind of mode configuration on hardware reset or power up.
The ADC3910D125 data sheet has no mention of M0..M2 mode pins. It just has SEN, SCLK and SDIO. They have internal pulldown resistors.
So is it important that these pins be held low during a hardware reset (or not driven by our SPI circuitry so the pulldowns can do their job)? Do they serve some boot configuration purpose that is not documented in the data sheet?
