K value not changing LMFC period in ADS52J90 and TI-JESDC link

Tool/software:

Hi,

I have set RX K Value as 4 in TI_JESDC IP,  as per previous thread.  

(+) TI-JESD204-IP: ADS52J90 K value =3 for 4 lane mode JESD IP does not work - Data converters forum - Data converters - TI E2E support forums

With the ADC connected and JESD locked, LMFC pulses every 3rd clock but as set value 4 above, we expect LMFC pulse every 4rth clock cycle.

It may be due the the default setting in ADS52J90 (Number of frames per multiframe  K =3).

We tried to change the value of K with "force K Value" and "K value"  in registers 0x49 and 0x53 respectively but still getting LMFC pulsing every third cycle.

We are operating ADC in 32 channel mode, 4 lane mode, hence having even number for K value is important to distinguish between even and odd ADC samples. 

Please let me know if I am missing anything here.

Also please note that rx_sysref_realign count reaching max "f" and may be increasing further as I can see stretching in between in rx_sysref

Thanks,

Trushal