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ADS131M08: input short by CFG register settings

Saad Jabir
Prodigy 230 points
Part Number: ADS131M08

Tool/software:

Hello , 

in our design , we use 4 channels from ads131m08 with digital and analog supply=3.3v.

Load cells bridge supply is also 3.3v.

We do testing on the input and we see that if we connect Ain-N  to Ain-P internaly  by setting the CHx_CFG register we still get a reading of arounf 600 on all channels!

Any explanation for this?

Also if we connect the AIn-N  and Ain-P to the bridge input and we hardware short the bridge we get a reading of around 3800 

I was expecting to read 0!

The gain is 128.

Thank you for any help

Saad

  • 0
    TI__Mastermind 45285 points

    Hi Saad,

    600 codes you got is reasonable when the input is shorted by setting the MUX0 bits in the CHx_CFG registers on M08, this is an offset and you need to do a calibration.

    When the bridge is excited with 3.3V, the common-mode voltage is usually half of the excitation voltage that is 1.65V. Please notice that the ADC input should be always limit within the following specification especially when the gain is higher than 4, so double check the inputs when they are connected to the bridge. 

    BR,

    Dale

  • 0 in reply to Dale Li
    Prodigy 230 points

    Hi Dale,

    This is serious !! , it means we need to change the design. But before that can you please explain what should we expect by having the bridge mid points at 1.65v??  which is half the 3,3V supply at  the ads131 input.

  • 0 in reply to Dale Li
    Prodigy 230 points

    Hi Dale,

    forgot to mention that we have a filter at the input composed of two 10K Ohm resistors and a capacitor. 

    Will this change the common mode voltage ?

    Regards

    Saad

  • 0 in reply to Saad Jabir
    TI__Mastermind 45285 points

    Hi Saad,

    If the gain you set in ADS131M08 is higher than 4, you will have to keep the input voltage less than AVDD-1.8V=3.3V-1.8V=1.5V. If your gain is less or equal to 4, the input voltage to AIN pin can be up to AVDD (3.3V). What's the gain you set? It would be good if you can share your schematic.

    You can check the detailed information in the app note below:

    A Basic Guide to Bridge Measurements

    BR,

    Dale

  • 0 in reply to Dale Li
    Prodigy 230 points

    Hi Dale,

    As said before , the gain is 128. 

    The bridge excitation is the same as  AVDD of the ads131 which means that we must have AVDD to be 3.6V at least to

    allow for (3.6-1.8=1.8V) of the bridge mid point which is the applied common voltage. 

    Any value of AVDD more than 3.6V will allow a better common mode voltage. Can we put AVDD to 3.7V ?

    The circuit is like your eval board with filter at each input. will the 10 k Ohm input filter  allow for higher common mode?

    What are the effects of having common mode a bit higher than (AVDD-1.8V)?

    Thank you!

    Saad

  • 0 in reply to Saad Jabir
    TI__Mastermind 45285 points

    Hi Saad,

    The recommended AVDD is between 2.7V to 3.6V as shown in the following table from the datasheet. The performance were tested and specified under this condition.

    The resistor can not change the allowed voltage to the ADC inputs.

    If the input voltage is higher than the specification in the datasheet, the performance can not be guaranteed.

    If you do not want to reduce the excitation voltage, you can use an instrumentation amplifier between the bridge and the ADS131M08 ADC input as shown in the figure 6-3 in the app note I shared.

    BR,

    Dale