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DAC3482: Data pattern checker - Real Time

Ohad Bonneh
Intellectual 2380 points

Part Number: DAC3482

Tool/software:

Hi Team, 

when we are using the data pattern checker we see that whenever there is inconsistency within the signal, we are getting the alarm as stated in DS. 

However, once the alarm is set, we couldn't find a way to reset it other then writing it with SPI, is there a different way to reset that register so we can have a "real time" system? 

thanks! 

  • 0
    TI__Guru* 80595 points

    Hello Ohad,

    The data pattern checker is tested in real time. The LVDS bus data pattern checker will check whether the input LVDS data is coming in correctly at the pre-set pattern and also checks for the correct setup/hold time. If there is any error or inconsistency with the pre-defined or programmed pattern, the alarm will flag.

    The alarms can be cleared by writing 0x0000 to iotest_results(15:0) and 0b to alarm_from_iotest through the serial interface. The serial interface will read back 0s if there are no errors or if the errors are cleared. The corresponding alarm bit will remain a 1b if the errors remain. Based on the pattern test result, the user can adjust the data source output timing, PCB traces delay, or DAC3482 CONFIG36 LVDS Programmable delay to help optimize the setup and hold time of the transmitter system.

    You will have to clear the alarms through SPI writes. There are no other ways to clear the alarm.

  • 0 in reply to Kang Hsia
    TI__Intellectual 2380 points

    Hi Kang, 

    Regarding your answer,

    I’d like to understand how the bit 12 of the register config1 (64cnt_ena) works.

  • 0 in reply to Ohad Bonneh
    TI__Guru* 80595 points

    Ohad,

    This register bit automatically clears the IO pattern checker alarm after receiving 64 good samples. This is only useful when setting up the initial IO pattern checker where there are transient events due to FPGA pattern still stabilizing and also the setup/hold time is in the fine tuning process.

    We cannot recommend the customer to use this constantly. For example, if there are any errors in between the 2 good sequence of 64 good samples:

    64 good samples -> bad sample -> 64 good samples vs. time

    The intent for the IO pattern check to catch the bad sample and record it

    However, the 2nd set of 64 good samples will automatically clear the alarm, and the user may not be able to catch the alarm in time.

    -Kang