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ADS1298: Questions about Lead-off detection

Part Number: ADS1298

Tool/software:

Hello,

We are using the ADS1298 and are having some issues with implementing leadoff detection.

We set up leadoff detection for DC, using the threshold of 95% and 5%, 12nA, and pullup/down mode.

We are finding that the EEG signal is no longer usable in this configuration, which is doubly unfortunate because the leadoff works great. Is this to be expected? Our input conditioning is just an RC LPF. Is there something else we can try?

Here is the schematic for the EEG:

Here is the code that sets all the ADS registers:

ADS_WREG(CONFIG1, 0x46); //No daisychaining, low power mode, no clock output, 250Samples/s
    ADS_WREG(CONFIG2, 0x00); //not using test signal, turn all off
    ADS_WREG(CONFIG3, 0xCC); //internal reference, no RLD
    ADS_WREG(LOFF, 0x17);
    for (int i = 0 ; i < NUMBER_OF_ADS_CHANNELS ; i++)
    {
        ADS_WREG(CH1SET + i, 0x10); //Gain of 8, normal operation for all channels
    }
    ADS_WREG(BIAS_SENSP, 0xFF); //bias correction on
    ADS_WREG(BIAS_SENSN, 0xFF); //bias correction on
    ADS_WREG(LOFF_SENSP, 0xFF); //All on
    ADS_WREG(LOFF_SENSN, 0xFF); //All on
    // ADS_WREG(LOFF_FLIP,0xFF);//All flipped
    ADS_WREG(GPIO,0xF0); //led on
    ADS_WREG(MISC1,0x00); //not using any functions related to misc1
    //skip RESP, defaults ok
    ADS_WREG(CONFIG4,0x00); //No respiration detect, one-shot mode, LOFF Comp enabled
    //skip WCT1 and WCT2
  • Hi Foo Bar,

    Thank you for your post. I have a few suggestions you can try:

    1. Disable all LOFF_SENSN and BIAS_SENSN bits. These are not needed if the INxN pins are externally shorted to AVSS.
    2. Close the feedback loop of the RLD amplifier locally by connecting RLDOUT to RLDINV. You can reference the ADS1298 data sheet and User Guide for component recommendations. It is important for the RLD to function properly in order to establish a consistent common-mode voltage. This ensures the input voltages will remain within range of the internal PGA and avoid saturation.
    3. Series input resistors can be reduced to 10k. The sinc3 digital filter provides a low frequency cutoff based on the data rate.
    4. Resistor based LOFF (bit 4 = 1b) does not use the ILEAD_OFF setting - that setting is only for the programmable current sources. R-based LOFF produces a current equal to approximately (AVDD-AVSS)/(2x9.9MΩ).

    Regards,

    Ryan