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DAC 5681Z (4DSP - FMC110)

Other Parts Discussed in Thread: ADS5400, DAC5681Z

Hi,

I am using the FMC110 from 4DSP, which combines an AD9517 clock tree, 2 TI DAC 5681Z and 2 ADC ADS5400.

The reference module works fine and clocks the DAC and ADC at 1GHz sampling rate.

The DAC5681Z is tuned with the words 0x00 and 0x01 (CONFIG10).

However, when I try to alter the incoming clock by using the dividers in the clock tree, everything goes awry.

When I divide my clock by two, the DAC 5681Z gives a FIFO error (FIFO pointers over run).

How can I solve this?

Thanks!

Michael

  • Michael,

    CONFIG10 needs to be programmed based on your data rate. We've made programming this register easy for you by providing the correct configuration based on your data rate, see the bottom of the table on page 9 of the datasheet. If the DLL is not locked, then correct data transmissiont to the DAC is not guaranteed. Secondly, make sure you sync the device after changing any options involving the clocks with either the SYNC pins or a software sync (bit 1 of CONFIG3). This will resync the FIFO pointers. Also make sure that the DAC output clock.

    Follow the steps shown in the startup procedure shown on page 40 when changing the clock frequency.

    Regards,
    Matt Guibord