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AFE11612-SEP: DAC CLR latency

Part Number: AFE11612-SEP

Tool/software:

What is the load condition associated with this screenshot?

Is the 2.5V/sec rate the DAC output takes to reach it's new value load dependent, or is it dictated by something like slew rate or DAC output buffer video BW?  Could the rise/fall time be shortened by buffering the DAC output to isolate the load?