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ADS131M04: READ AND WRITE ISSUE

Part Number: ADS131M04
Other Parts Discussed in Thread: AMC131M03

Tool/software:

Hi im using ADS131M04, im trying to communicate with the ic, im reading the default registers value, but data is incorrect.in the just trying to read the mode register default value.

uint16_t ADS_ReadRegister(uint8_t reg_addr)

{

uint8_t tx_buf[3] = { 0 };

uint8_t rx_buf[3] = { 0 };

// RREG command format: 001a aaaa annn nnnn → 0x20 | (addr << 1)

uint16_t opcodes;

opcodes = OPCODE_RREG | (((uint16_t) reg_addr) << 7);

tx_buf[0] = (uint8_t)((opcodes >> 8) & 0x00FF);

tx_buf[1] = (uint8_t)(opcodes & 0x00FF);

tx_buf[2] = 0;

HAL_SPI_TransmitReceive_DMA(&hspi3, tx_buf, rx_buf, 3);

return ((uint16_t)rx_buf[0] << 8) | ((uint16_t)rx_buf[1]);

}

void ADS_WriteRegister(uint8_t reg_addr, uint16_t data)

{

uint8_t tx_buf[6] = {0};

uint8_t rx_buf[6] = {0};;

uint16_t opcodes[1];

opcodes[0] = OPCODE_WREG | (((uint16_t) reg_addr) << 7);

// WREG command format: 011a aaaa annn nnnn → 0x60 | (addr << 1)

tx_buf[0] = (uint8_t)((opcodes[0] >> 8) & 0x00FF);

tx_buf[1] = (uint8_t)(opcodes[0] & 0x00FF);

tx_buf[2] = 0x0;

tx_buf[3] = (uint8_t)(data >> 8) & 0x00FF;

tx_buf[4] = (uint8_t)data & 0x00FF;

tx_buf[5] = 0x0;;

HAL_GPIO_WritePin(CS2_GPIO_Port, CS2_Pin, GPIO_PIN_RESET);

HAL_SPI_TransmitReceive_DMA(&hspi3, tx_buf, rx_buf, 6);

HAL_GPIO_WritePin(CS2_GPIO_Port, CS2_Pin, GPIO_PIN_SET);

return;

}

both the read and write or not working and onemore the ic is started giving the data continuosly example 4ksps for default mode value. im making chipselect low for continuously.

what to do any suggestion, is there frame format is correct or not. MY SPI CLK IS 10MHZ AND CLKIN IS 8MHZ

  • Hi srinath B,

    Your read command is incorrect. You are sending '001a aaaa annn nnnn' to the ADC, the correct RREG command is '101a aaaa annn nnnn'. If you want to read the GAIN register (04h address) from ADS131M04 as an example, 1010 0010 0000 000 (0xA200) should be sent to ADS131M04.

    The following timings can be a good reference for you:

    1. RREG: read the GAIN register (0x4 address)

    2. WREG: write CLOCK register(0x03) + register data. Note: the 2nd frame in this timing is used to check the response from the ADC. A short frame with two words (each has 24bit) can be used for WREG+Data too.

    3. Normal Operation for reading conversion data from all 4 input channels of ADS131M04. Total 6 words (24-bit length for each word) in a frame are needed, STATUS word + 4-CH conversion data + CRC word.

    Let me know if you have any more questions. Your timing plot will be preferred to check.

    BR,

    Dale

  • hI dale thankyou for your response.

    im having an doubt in RREG. when we want to read an mode register values, the response for that will come in first or second frame. same like in your second imgae write reg, you have writes the default clock value to this register for that the response is also second frame?. if it in second frame we have to send null command to get that data.

    uint16_t ADS_ReadRegister(uint8_t reg_addr)

    {

    uint8_t tx_buf[6] = { 0 };

    uint8_t rx_buf[6] = { 0 };

    uint8_t tx_buf_ads[6] = { 0 };

    uint8_t rx_buf_ads[6] = { 0 };

     

    uint16_t opcodes;

    opcodes = OPCODE_RREG | (((uint16_t) reg_addr) << 7);

    tx_buf[0] = (uint8_t)((opcodes >> 8) & 0x00FF);

    tx_buf[1] = (uint8_t)(opcodes & 0x00FF);

    tx_buf[2] = 0X00;

    // HAL_GPIO_WritePin(cs_GPIO_Port, cs_Pin, GPIO_PIN_RESET);

    HAL_SPI_TransmitReceive(&hspi3, tx_buf, rx_buf, 3, HAL_MAX_DELAY);

    // HAL_GPIO_WritePin(cs_GPIO_Port, cs_Pin, GPIO_PIN_SET);

    MODE = ((uint16_t)rx_buf[0] << 8) | ((uint16_t)rx_buf[1]);

    // HAL_GPIO_WritePin(cs_GPIO_Port, cs_Pin, GPIO_PIN_RESET);

    HAL_SPI_TransmitReceive(&hspi3, tx_buf_ads, rx_buf_ads, 3, HAL_MAX_DELAY);

    // HAL_GPIO_WritePin(cs_GPIO_Port, cs_Pin, GPIO_PIN_SET);

    return ((uint16_t)rx_buf_ads[0] << 8) | ((uint16_t)rx_buf_ads[1]);

    }

     

    if u see this example this an correct to way read the register data or not? and in this chip select is held low completely.

    in above example first time im sending the read reg command and second time im sending the null command, during which command i have to verify the register response.

    suppose if a read an default value from any register the respone should be also there default value only right.

    please verify this is correct or not

    thanks,

    srinath

  • Hi srinath B,

    If you read a single register with RREG command, the register data will be seen on the first word of the 2nd frame. 

    If you read multiple registers with RREG command, the 1st register data will be seen on the first word of the 2nd frame and the 2nd register data will be seen on the second word of the 2nd frame...

    If you write a single register with WREG command, the response from the ADC will be seen on the first word of the 2nd frame. You can actually read the register data back to check whether your register writing is correct or not, no need to wait and see the ADC's response in the 2nd frame.

    You can check the timing in figure 8-23/8-24/8-25 and the description in the ADS131M04 datasheet for all these information.

    BR,

    Dale

  • hi dale thanks, i will try whatever u have suggested.  if see the image im sending 18 bytes of null data to get the adc data , during that my first word(reponse)  last byte always coming 0x80 ,and my last word crc  last byte is coming both 0x0 and  0x80 , what to do for this how to rectify this , since both the have to come 0x0 right . what issue will be there  and i cant able to match the crc. please suggest something how to resolve this.

    thanks,

    srinath

  • Hi srinath,

    There is no way to debug without a timing. There is on more suggestion, the SPI configuration should CPOL=0 and CPHA=1, you can double check your configuration in your microcontroller.

    BR,

    Dale

  • Hi dale thankyou for your response. im started reading the data. now im checking AMC131M03 IC, in that im facing an issue i have configured data for 16bits , dcdc enabled and OSR of 128 , all are working fine. but sometimes my crc is not matching lets say once in an 300 or 400 reads, during that time im getting an value in status register is 0x0203 , which means last channel data is not ready and word length is showing 32 bits and reset bit is  0 showing no reset occured.

    during when my crc is correct , my status register is showing 0x0407 , always  which means all channels data are ready, word length is 16bit and reset bit is 1 indicating reset is occured.

    but this is happening once in every some 200 to 400 between reads and and after that again some 200 to 400 times crc is matching , what could be the reason. what that reset bit indicates in status register and what is the use. during contiuous reading what value that reset bit should be. 

    can u suggest how to rectify this. during all these check im not giving any input to channels of ic , im just trying to read and write and verify the crc

    regards,

    srinath

  • Hi srinath,

    Are you using or testing ADS131M04 or AMC131M03? AMC131M03 belongs to a different team and it is supported by them. 

    BR,

    Dale

  • Hi Dale , now I'm using amc131m03 , this issue is also in this ic only

  • Hi srinath,

    Can you post a new query about AMC131M03 so that the right team can support?

    BR,

    Dale