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ADS7047: Question about the 45/55 duty cycle limit of the SPI clock input

Part Number: ADS7047

Tool/software:

Hello,

I would like to interface the ADS7047 ADC to my FPGA over SPI. I went through the specification in the datasheet. It states that the SPI clock (SCLK) must have a maximum 45/55 duty cycle (tph_CK and tpl_CK)

Is the 45/55 duty cycle (min and max) defined as a percentage regardless of the SPI clock frequency? Or is it an absolute timing in nanoseconds?

My SPI master clock also has a 45/55 duty cycle limit. So I am wondering whether there is a reason for the percentage.

Thank you in advance

  • Hi Jerome,

    In the datasheet, the duty cycle is is described as a decimal SCLK high and SCLK low time relative to the SCLK cycle time, so yes, 45% to 55% duty cycle for the entire SCLK frequency range. This requirement is just to keep the timing window for setup and hold times between rising and falling edges consistent throughout the whole temperature range.

    Regards,
    Joel

  • Hi Joel,

    The minimum time period from the datasheet is 16.66 ns so 60 MHz.
    16.66 x 0.45 = 7.497 ns
    16.66 x 0.55 = 9.163 ns

    For a 50 MHz SCLK the period is 20 ns.

    What if I have a 0.44/0.56 duty cycle which is:
    20 x 0.44 = 8.8 ns greater than 7.497 ns
    20 x 0.56 = 11.2 ns greater than 9.163 ns

    This should be above the setup and hold margins of the fastest clock 60 MHz?

  • Hi Jerome,

    It's possible you might be able to get away with a clock slightly out of spec to the datasheet, but this has not been characterized for to say definitively for every device. The 0.45 to 0.55 high time is guaranteed to work on every device across the entire temperature range. In general, slight delays are often added to fulfill setup and hold times if the clock is running faster than the minimum requirements.

    Can you share what conditions might have you operate outside the maximum and minimum duty cycle specs, and if it would be helpful to include further information on the datasheet?

    Regards,
    Joel