Hi,
I am working on a DE4 board interfacing with DAC5682Z EVM.
The requirement of the clkin of the EVM is 1Vrms, what is the most common way of generating this clock? I suppose for the purpose of synchronizing FPGA and DAC, the clock should be generated from the clock network if FPGA? But what do I do about the 1Vrms requirment?
Also I've configured the DAC EVM to transformer output to evaluate the pure DAC signal. I've read that the transformer output blocks DC component. Does that mean the this DAC would not be able to converter a square wave signal etc.?
Best wishes,
Liang