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ADS127L18: Frame-Sync connection, and SPI Configuration

Cameron Kirsch
Prodigy 20 points
Part Number: ADS127L18

Tool/software:

Hello, I have a question regarding the Frame-Sync operation on the ADS127L18. We are connecting this ADC to a PIC32 MZ family MCU, and our plan is to use an SPI port on the PIC32 running in Framed SPI mode where the ADS127L18 will act as Frame Master, and SPI master.

The ADC will have a dedicated clock of 32.768 MHz and use a single DOUT line for channel data. The DCLK signal will be acting as the serial clock signal for the SPI port, the DOUT0 signal will be the serial data in port on the PIC32, and the FSYNC signal will become the Frame sync pulse of the SPI port in framed mode.

Mainly this question is just to confirm that this type of setup should work with the Frame-Sync port provided, as well as what sorts of limitations this may imply on the operation of the ADC.

Any information would be greatly appreciated!

  • +1
    TI__Mastermind 46550 points

    Hello Cameron,

    Welcome to the TI E2E community.

    I had to dig into the specifications for the framed SPI mode in this MCU.  There are a few differences that may require additional hardware.  Please refer to the PIC32 FRM, Figure 23-14 (https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/ReferenceManuals/61106G.pdf)

    • The frame sync width on the ADS127L18 is 50% of the data rate period.  The framed SPI mode in the PIC32 expects a single DCLK (SCLK) width for this signal.  The PIC32 may not care if the width of this signal is wider than 1 SCLK, but you would need to check with PIC32 support team to confirm.
    • The framed SPI mode expects the frame sync 1 SCLK period before the MSB of the data packet; the ADS127L18 sends the MSB at the same time as the frame sync edge.  In this case, I think adding a shift register (d-flop) to the DOUT should delay the data by 1 clock period, allowing proper capture of the MSB.

    Also, depending on the data rate and frame size, there may be extra SCLKs with non-data (this is different from a typical audio interface).  In this case, you would need to adjust the frame size on the PIC32, and some of the data would be dummy results, and would need to be removed from the overall data capture.

    Also, we do have a method using standard 3-wire SPI in peripheral mode that can capture the data.  This method does not use the frame-sync signal, and simply holds the data converter in a 'STOP' mode until the SPI port is ready to capture data.  Since frame-sync is not used, any transient or glitch in the data will get the SPI port out of synch with the ADC, so using the STATUS or CRC bytes is recommended so the MCU (PIC32) can determine if the data is incorrect and then re-synchronize the interface.  The example code was written on a TI MSPM0, but is generic and can be used on any MCU.  The code can be found at the below link:

    https://github.com/TexasInstruments/precision-adc-examples/tree/main/devices/ads127l18/MSPM0_example

    Regards,
    Keith Nicholas
    Precision ADC Applications