[FAQ] DAC8775: How is the SDO mode controlled in SPI?

For the DAC8775 and DAC8771, the data sheet is not very clear, but the DSDO bit (bit 4, Select DAC Register 0x03) sets the behavior of SDO.

The DSDO bit is described in the data sheet as a disable SDO. Instead, it should be described as setting the SDO in and out of daisy chain mode. In daisy chain mode, which is the default at startup, the SDO is an output at all times to prevent the SDO from glitching as the /CS goes low. 

The DSDO bit setting should be described this way:

• DSDO = 1: SDO is Hi-Z when the /CS is high
• DSDO = 0: (default) SDO is always active as if using the device in daisy chain mode.

Again the default of SDO is actively driven regardless of the /CS line. This is used for the daisy chain mode.

If you have multiple devices on the same SPI bus, you may want to tie all of the SDO lines together. To set the SDO so that it is Hi-Z when /CS is high, you would first need to write the DSDO bit 4 in the 0x03 register to be high. This should give the expected Hi-Z behavior for SPI, and you should be able to join all SDO outputs on a common bus.

Joseph Wu