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ADS7042: Can CS stay low during continuous sampling on ADS7042?

Part Number: ADS7042

Tool/software:

Hi TI Team,

I’m planning to use the ADS7042 with an Ambiq MCU and stream data via SPI + DMA at ~400 kSPS (or higher if MCU permits).

To simplify the SPI handling, I’d like to keep CS low continuously during a long acquisition (e.g., to gather 0.5 million samples).
Is this supported, or must CS toggle high between samples?

The datasheet mentions tACQ, but it’s I would like to know whether CS must return high to start a new sample.

The reason I ask is that Ambiq MCUs don’t easily support CS toggling between SPI frames when using DMA.

Thanks for your help! 

Best

David

  • Hi David,

    Each conversion cycle needs to see a falling edge of CS in order to start outputting the first bit of SDO and to initiate the conversion process, so unfortunately, CS can't be held low to acquire multiple samples in succession. 

    Regards,
    Joel