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ADC12DJ5200-SP: CLKIN Termination when Driven by LMX2615

Part Number: ADC12DJ5200-SP
Other Parts Discussed in Thread: LMX2615-SP

Tool/software:

Hello,

Do the ADCs need any additional termination on the CLKIN inputs other than the internal 100Ω resistor when being driven by a PECL driver at 4.8GHz?  Any recommendations?  In our application we use an LMX2615-SP which has an IBIS that you've indicated may not be okay to use.  So we've added attenuators to the input of the ADC CLKIN pins so we have ability to attenuate the signal as needed.  Despite the untrusted IBIS for the LMX, we run the sim and it looks really bad when we use an S-parameter model for our attenuator but looks good when we use an all resistor "T" network in Hyperlynx.

Much appreciate any feedback you might have on this topic.

Thanks,

  • Hi Joseph,

    Unfortunately, I cannot comment or give much insight on the simulations or models available. 

    However, I would always terminate externally from the inputs as the effective internal "100ohm, etc" has a 20% tolerance and is not a real resistor.

    The termination value may need to tweaked depending on the length of the traces, pcb routing, etc from the LMX to the ADC clock inputs in order to get a healthier edge.

    I have always found a lighter termination externally helps reflect the internal impedance and provides a better match, etc. 500ohms DIFF is a good starting point. If you have a series option for termination, all the better, but may not be necessary.

    Regards,

    Rob

  • Thanks, Rob.  I just wanted to be sure your external 500Ω isn't a typo?  Did you mean 50Ω?  We had another apps engineer say that in this realm (4800Mz) the internal impedance of the part goes low so you want to add some sort of external matching network.  When I do research in the AI tools they have indicated that an LC PI filter is best for the RF domain cause it maximizes power efficiency etc.

  • Hi Joseph,

    1k to 500ohm, no typo. That is what I do. Typically if you are using a PECL based interface at 4.8GHz. Then you would do a far termination near the ADC's clock inputs. This is also assuming the interconnection between the two is long, say 1inch or more.

    If you do have room, a low loss filter is good too, this will help remove spurious harmonics or otherwise. As well as cut out any wideband noise that may convolve to the output spectrum.

    However, don't filter too much as you may hurt the slew of the clock edge.

    if you need to discuss offline, please let me know and I can email you.

    Please let me know.

    Regards,

    Rob