Tool/software:
I have a few questions that are not clear to me after reading the datasheet - I do not have hardware yet to test any of this:
I would like to use the device without SCL stretching and use the CNVST bit to start the conversion manually and then poll the OSR_DONE bit and read the RECENT_CHx registers for the result, as described in section 8.3.6. I would like to average using 4 samples (OSR = 2). For now, I only need one analog channel, so I do not need the sequencer, therefore I want to use the manual mode (CONV_MODE = 0). However, per the datasheet, CLK_DIV is only used with autonomous mode (CONV_MODE = 1). So I think this might be wrong, because I assume that CLK_DIV must be used for the sampling frequency as soon as OSR is non-zero.
As a workaround, I could enable the autonomous mode and configure a single bit in AUTO_SEQ_CH_SEL. But then I don't know when the conversion starts and stops. I am assuming that starting is done by setting SEQ_START (and not with CNVST), but how do I know when the RECENT_CHx register will contain the value? Maybe OSR_DONE can still be polled when using only one channel, but how can this work for multiple channels? See next question.
In autonomous mode and sequencer sampling multiple channels, will the OSR_DONE bit indicate completion every time a sample is available, or only when a full sequence for all applicable channels was completed? If the indication is per channel, how do I know which RECENT_CHx register was updated?
