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DAC37J82: DAC37J82 settling time

Part Number: DAC37J82

Tool/software:

Hi TI,

DAC37J82 Maximum Sample Rate is 1.6Gsps, but output settling time to 0.1% is 10ns, 如何理解二者的关系?

举个例子, 假设我输出的模拟信号带宽是400MHz, 模拟信号是  0(0x0000) 和 full scale voltage(0xfffff) 去 toggle,DAC37J82 可以输出这样的信号吗?settling time is 10ns, 那么banddwidth是100MHz,  看起来是达不到的,我这样理解对吗? 还是DAC37J82 有多级pipeline转换架构, 可以达到800MHz的采样带宽。

麻烦帮忙解答一下,谢谢。 

  • Hi,

    I cannot read this post clearly, as most of this in Mandarin. I am closing this post.

    Please open another post and respond in English.

    Thanks,

    Rob

  • Hi,

    I want to ask a question about DAC37J82 usage. DAC37J82 maximum sample rate is 1.6Gsps, but output settling time to 0.1% is 10ns(100MHz), so i am not sure whether the max analog output bandwidth can exceed 100MHz.

    Eg: Assuming DAC37J82 output an analog signal, every DAC step swing from 0 to full scale, frequency is 200MHz, rise/fall time is 1.25ns, is it ok?