ADC12D1600RB: How to use EXT_TRIG for external triggering with FPGA?

Tool/software:

Hi,

I'm working with the ADC12D1600RB evaluation board and aiming to implement external triggering using the EXT_TRIG input signal.

I can confirm that external triggering works fine when using WaveVision5 — the board properly responds to the EXT_TRIG signal in that setup (adc10d1000_xc4vlx25_adc12d1600rfrb2.bit is loaded into the FPGA when starting). However, I would like to go beyond what WaveVision5 allows, particularly to increase the maximum trigger frequency and have more control over the acquisition logic. For that reason, I’m developing a custom FPGA design.

The issue is: while EXT_TRIG is clearly defined as an input in the FPGA I/O constraints, the Verilog sources provided in snac039.zip do not appear to make use of this signal at all. I couldn’t find any logic referencing EXT_TRIG for controlling sampling or triggering.

So my questions are:

• Has anyone successfully used EXT_TRIG in a custom FPGA design on this board?

• Are there any reference examples showing how EXT_TRIG can be integrated into the acquisition control?

• If not, could someone from TI explain how EXT_TRIG is expected to be handled in the FPGA design?

Any guidance would be greatly appreciated!

Thanks,

Jerome