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ADS8686S: sampling time questions

Lillian Liu(SH)
Expert 4620 points
Part Number: ADS8686S


Tool/software:

Hi team，

Can you use this ADS8686S as an example to teach me how to calculate the total time required for a data to enter the ADC and come out?

And I also have some questions as below:

1. If we want to use two ADS8686S to achieve 16-channel measurement, can we use the same convert?

2. If we share a convst signal, how is the delay of each channel of the second chip calculated, and what are the data at each time?

3. Is there a FIFO inside the ADC? Is the data read from the previous convst? Will it be washed out by the new data? How long does it take for the SPI to fetch the data at the latest after the convst signal ends?

4. In Burst Sequencer, Software Mode, what is the specific calculation of tBURST? According to the formula in the manual: are tACQ and tRB repeated? What is 50ns?

Thanks

Lillian

  • 0
    TI__Guru**** 181701 points

    Hi Lilian,

    1. Yes, you could use one CONVST signal with two ADS8686S devices.  Please review section 7.1 and 7.3.1 of thge datasheet, there are only two ADC's in the package so only two channels are sampled simultaneously - if you have two ADS8686S, that would allow four channels to be sampled at the same time. 
    2. The maximum throughput is 1MSPS/ADC so you can get two channels of data every 1uS, you can read all 16 channels in 8uS MAX.  If you have two devices, there would be no additional delays assuming you have the four SPI ports or you connect them to a 32-bit parallel data bus.
    3. No, there is no FIFO in the ADS8686S. You would need to wait for BUSY to go low before reading out the data.  The SDO is for the current conversion cycle so the time it takes to read out from the SDOs is dependent on the DVDD voltage (see 6.6) and Figure 6-5.  Any data not read out by the controller will be lost.
    4. BURST operation is dependent on the number of channels selected - each channel needs the tACQ plus tCONV plus readback time.  The 50nS accounts for the internal sequencer operation.
  • 0 in reply to Tom Hendrick
    TI__Expert 4620 points

    Hi Tom,

    Thanks for your reply.

    Can you use this ADS8686S as an example to show the whole time calculation for time required for a data to enter the ADC and come out?

    And if you have any related file, pls share with me.

    Thanks

    Lillian 

  • 0 in reply to Lillian Liu(SH)
    TI__Guru**** 181701 points

    Lillian,

    I'm sorry, but I can't really do that for you without knowing what exactly it is that you have planned.  As noted, overall it takes 1uS per 2 channels if everything is running at full speed.  Pulse CONVST, wait for BUSY to go low, apply 16 SCLKS - if you know your SCLK frequency, take the inverse of that and multiply by 16.  Add the MAX tCONV time and setup time for /CS to SCLK and that is it.  The math is not difficult.