ADS7038: TI-ADS7038 Only Reads First Analog Channel

Analyzer Pics

Joel,

Hi. Thanks for looking at this. I'm already selecting the channel. See above in my code.

/* Select the channel */
ADS_7038_Reg_Write(InstancePtr, ADS_7038_OFFSET_CHANNEL_SELECT, (u8)index_channel);

Where:

#define ADS_7038_OFFSET_CHANNEL_SELECT  0x11

I know my register right and SPI bus write code are working because the voltages I read from channel zero are exactly matching the test voltages and we can move the test voltages all over and the 7038 is reading the same voltage from analog input zero. This also proves that the SPI bus is working fine. But when I try to change the channel as you pointed out we just get the same voltages as channel zero regardless of what channel we select.

Also I am reading back the channel select register right after I write a none zero value to it and the value I read back is always zero. If I read other registers such as the status register or recent measurement register I get non zero values.

Everett

Hi Everrett,

Can I see the logic analyzer result of that command being sent? It would help to verify that the right command is being sent and that the right register is being written to in the correct format.

Let me know if you sent it above. I think the MOSI (SDI) and MISO (SDO) lines might have been switched on the logic analyzer.

Regards,
Joel

OK, Thanks, I'll send some new graphs today.

Sounds good. Also feel free to export the logic capture as a file and attach it here as a .zip so that I can open it and interact with it as well. It is usually easier than sending multiple screen captures, and I get better resolution.

Regards,
Joel

Sorry for the delay. I'm having trouble make our SPI bus transmit and receive look like what is recommended in the 7038 spec for a channel select and specifically for a register write and read. Also, when the logic analyzer shows a good decoded read register response for confirming the selected channel register my software can not read it from the SPI bus receive FIFO. So I need to capture new graphs and spend a bit more time trying to figure out why the receive FIFO is not holding the expected channel byte. Please keep the issue open. Thanks.

I have a full set of graphs now for all transactions, I believe the one below is the only one that is really necessary. It shows the read register transaction for reading back the channel select register at offset 0x11. The reason this is important is because we are still reading the same voltages from all channels, and I don't think we are actually changing channels, and when I read back the channel select register after writing the next channel index to it, the value always comes back as zero.

Notice in this graph, I believe after tuning my SPI bus C code the entire transaction is about as close to the graph in the spec for a read register as it could be, also notice the response from the 7038 is clearly the correct channel index byte, and this is true for all seven channels, although the graph below only shows the transaction for channel 4. 

The problem is when I read the SPI bus FIFO I'm always getting back a zero. So I don't think I am reading the FIFO correctly. One possible explanation is that the 7038 is actually transmitting back zeros on MISO for the clock segments in the graph where the line is low and I'm not reading enough FIFO bytes to get to the byte containing the correct channel index from the 7038. I'll explore this today. If you can think of any hints on how to read this correctly let me know.

See graph here. (Obviously MISO and MOSI are flipped here).

I'm reading all six possible MISO bytes for all such transactions from the SPI RX FIFO literally thousands of times and always getting back all zeros even though the logic analyzer clearly shows 7038 transmitting good channel index bytes. My SPI poll transfer code works for reading the raw ADC registers because the voltages match the test voltages. So not sure why the same method can't work for reading the channel select register. Not sure what to do at this point. 

Hi Everett,

That's definitely unusual. I would expect at least something to come out. I tried it myself, and here are my results (see the table on the right). The timing isn't so critical here, as there are big delays between each byte that is sent, but it is still responsive.

I tied channel 4 to AVDD to get 0xFFF. Given that, I would expect some result for you at the very least, even of a couple LSB. What input voltage are you giving the device? Can you verify there is continuity between the input pin of the device and where the input is being supplied?

Other than that, maybe some previous configuration is causing an issue. Are you able to power up the ADC in default operation with no configuration, just change the ADC channel, and read back the result? If none of the above work, it might be that the device itself is damaged, and it should be swapped out with another to check.

Regards,
Joel

We are continuing to have problems, primarily in two areas. I can no longer get predictable results for hardware readings and the readings don't match the applied voltage, although they did previously. When I do get ADC values and calculate the voltage and it matches then I continue to see the reading on multiple channels and often on all channels, so it still appears that my command to change the channel is not being received.

I decided to change to Auto-Sequence Mode as described in the 7038 spec section 7.4.4. The reason is because it takes the channel change issue out of the equation. As far as I can tell everything is working at the level of my software and SPI bus communication. I will provide a complete set of plots below. This leads me to believe this is all caused by a hardware issue and not the SPI bus or the 7038.

I would ask that you briefly inspect the following diagrams to confirm to me that I am programming Auto Sequence Mode correctly and if you can do that then I recommend we close this issue for now. The reason being that I can't rule out hardware issues in our test setup until we re-spin the board and have the 7038 installed correctly and all the pins and analog inputs configured in terms of isolation, grounding and other hardware requirements outside my understanding. Then if the problem persists with the SPI pins and analog inputs manufactured correctly we can re-open the issue.

So in closing please inspect the following and verify my Auto Sequence Mode.

01 Total Transaction Overview, One auto sequence followed by reading all recent value registers for confirmation.

02 Write to register 0x12 select all channels.

03 Write to sequence config register at 0x10, 0x11 = Sequence Mode, Start

After this point I toggle CS between each read and read the SPI input FIFO MISO (reversed in image) to acquire each channel.

04 Overview of read sequence

05 Read Channel 0

06 Read Channel 1

07 Read Channel 2

. . . 08 Read Channel 7

09 Terminate Auto Mode Sequence

The following is not necessary but I did it for debugging hoping to get the same values in the recent registers starting at A0 as I did for reading the channels from the SPI MISO auto sequence, unfortunately this was not the case. But here are the diagrams.

10 Read register at A0 offset 0 (Reading AIN 0 MSB)

11 Read register at A0 offset 1 (Reading AIN 0 LSB)

If all that was correct then we can close this issue until we have the 7038 situated in a production board.

Thanks for your help.

Hi Everett, 

I've taken a look at this a couple of times over and don't notice anything in the sequence that might be wrong. I'll go over it once more and try to recreate it on my own board, but yes, it might be worthwhile to try this on another board spin to rule  there are issues with the current one.

Regards,
Joel

Joel,

Hi. Thanks for taking a look at the auto sequence output. We can close this thread as I have what we need for now and I will either reopen or start a new thread to reference this one, if necessary, when further testing is possible after our hardware re-spin. Also, thanks for your attention, much appreciated.

Everett