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DAC61408: DAC Not Outputting on All 8 Channels – ZCU104 FMC Interface

Part Number: DAC61408

Tool/software:



Simulation and circuit design (2).pdf

Hi everyone,

I’ve been troubleshooting an issue for the past couple of weeks where my DAC is not producing any output on any of its 8 channels. I’ve attached simulation snapshots and the DAC circuit design for reference.


Attachment consists of: 

  • The first simulation screenshot shows the DAC configuration sequence.

  • The second simulation shows the data transmitted via MOSI to set an output of -0.1V for both Channel A and Channel B.

  • The DAC is configured to run in asynchronous mode, so SDO and LDAC are left unused.


Hardware Details

  • I’m interfacing the DAC with a ZCU104 board via the FMC connector, with the following connections:

    • MOSI, SCLK, SS_N, SDO, and LDAC originally connected to the respective FMC_LPC pins.

Modifications made during debugging:

  • SCLK: Initially connected to FMC_LPC_IIC_SCL, now rerouted via jumper wire to FMC_LPC_CLK0_M2C_P (also used as the clock input for an ADC).

  • SDO: Disconnected from FMC_LPC_IIC_SDA

  • VCC: Discovered that the DAC requires >9V to operate. I soldered a jumper wire from a 12V rail directly to the DAC's VCC pin (L2).


Issue

I’m not seeing any voltage output on any channel of the DAC. I'm unsure whether the issue lies in my circuit design, signal integrity, or configuration code. Do help me figure out where the issue lies. 

  • Hi Syazwani,

     

    Please share the measured value of each power pins on the DAC61408 device. And capture and share the scope plot for SPI lines.

     
    Thanks,

    Sanjay

  • Hi Sanjay,

    I hope you're doing well. I don’t have access to the board at the moment, but I’ll make sure to send over the required details first thing on Monday morning.

    Just to confirm — you would like a snapshot of the voltage measurements on the multimeter for VCC, VSS, VAA, and VDD, as well as a hardware ILA capture from Vivado showing only the MOSI, SS_N, and SCLK signals, correct?

    Please let me know if I’ve understood your requirements correctly.Thank you :)

  • ILA Scope.pdf

    Hi Sanjay,

    Please find the attached PDF, which shows the SPI communication (MOSI, SCLK, and SS_n lines). Here's a breakdown of the waveform content:

    1. Page 1: Shows the first five SPI transactions for configuration, followed by data signals used to set output voltages on the channels.


    • Page 2: Blue timing markers indicate:

      • First two markers: SCLK frequency (2066 – 2.070)

      • Next two markers: Time between configuration commands (2122s – 2129)

      • Last four markers: Timing between data signals (2542 – 2784 and 2882s – 3125s)

    • Page 3: Repeats key timing markers for clarity:

      • SCLK frequency (2066 – 2070)

      • Configuration interval (2122 – 2129)

    Another Issue observed:
    The LDAC test point reads 0.882 V when the board is unprogrammed. Since it's connected to a pull-up resistor, shouldn't this be closer to 1.8 V?

    Any input or suggestions would be greatly appreciated.

    Thanks in advance!

  • Hi Syazwani,

    I saw the plots but it's difficult to understand as the picture is not clear. Can you please send a clear picture of the SYCN, SCLK, SDI and SDO lines probed near the device pin. 

    And please do share the measured power voltage values near the device pin (no need to send a snapshot for this).

    I am okay to have short meeting if it helps.

    Thanks,
    Sanjay  

  • Would you be available for a short Teams meeting tomorrow? I can share my screen to walk through the ILA scope captures and the Gerber file. Apologies—I might havve accidentally deleted the measurements from my previous reply.

    For reference, here are the current power pins readings:

    • VIO ( probed from C4): 1.798 V

    • VCC (C8): 12.06 V

    • VSS (C12): - 4.97 V

    • VDD (C15): 4.98 V

    Let me know what time works best for you. 

  • I am closing this thread as this issue being debugged over mail.

    Thanks,
    Sanjay