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DAC39RF10: Clarification on TI_MODE and TEST Mode Configuration

tabe
Prodigy 70 points
Part Number: DAC39RF10


Tool/software:

Dear TI Team,

I have two questions regarding the DAC39RF10:

  1. TI_MODE in JCTRL Register

    Could you explain the functionality of the TI_MODE bit in the JCTRL register? I am currently using TI’s FPGA Transmitter IP core in my setup.

  2. TEST Mode Configuration

    In JMODE10, I am successfully transmitting user pattern data on both DAC channels. I attempted to enable the internal PRBS output using the following steps:

DP_EN     (0x02E0) <- 0  
JESD_EN   (0x0100) <- 0  
JTEST     (0x0121) <- 4 or 1  
JESD_EN   (0x0100) <- 1  
DP_EN     (0x02E0) <- 1

However, the DAC continues to output the user pattern data instead of the selected internal PRBS sequence.

Could you please clarify the correct procedure to activate TEST Mode in this configuration?

Thank you in advance for your support.

Best regards,

tabe_mesh

  • +1
    TI__Expert 3550 points

    Hey Tabe, 

    The TI mode changes the scrambling coefficients. The TI JESD-IP currently does not use these updated coefficients so leaving it turned off, even when using our IP is the current way to use the device.  

    For PRBS testing you will need enable BER testing. 

    Bring the device up in a normal mode of operation (as you have done). Once confirmed the link is up and all settings are working you can switch the FPGA to PRBS mode. 

    For the DAC configuration, 

    Disable datapath write(0x2E0, 0x00)

    Disable JESD write(0x100, 0x00)

    Set the JTEST bit mode. write(0x121, 0x01) (for PRBS7)

    Enable JESD write(0x100, 0x01)

    Enable datapath write(0x2E0, 0x01)

    Wait until the SERDES PLL is locked. read(0x107) (bit 2)

    Enable BER write(0x1A0, 0x01)

    Wait some amount of time. 

    Disable BER write(0x1A0, 0x00)

    readback bit error count for each lane. (Starting at address 0x01B0 for Physical lane 0)

    The bit error rate is the (error count)/((serdes rate)*(wait time))

    Regards, 

    Matt