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ADS7047: Board layout for the ADS7047

John
Prodigy 40 points
Part Number: ADS7047
Other Parts Discussed in Thread: ADS7049-Q1EVM-PDK

Tool/software:

I am considering a design that uses seven of the ADS7047. I had purchased the evaluation module ADS7049-Q1EVM-PDK and it seems to work for my application. I'm trying to layout my board and I have some concerns about signal integrity at the 60 MHz frequency of the sclk. I'm trying to use the evaluation module as a reference but I have some questions. Why was the series termination resistors R15, R17, R18, R20 placed near the receiver? Were the traces designed for a 50 ohm impedance? In that case, I would think you would want the series termination resistor plus the driver output impedance to add to 50 ohms. Was any other special consideration given to the layout of the traces for the digital signals? I couldn't find any design documentation for the communications board that contained the FPGA. Thank you for any guidance you can provide.

  • +1
    TI__Genius 14960 points

    Hi John,

    In practice, for a majority of lower speed/short length situations, SPI lines don't need any termination, regardless if it is at the receiver or driver. However, the purpose of the resistors is to slow down the fast edges of the driver in order to prevent overshoot and ringing. Because of this, placement is usually not as crucial, even at 60MHz SCLK.

    As SPI itself has no impedance specification, the termination resistor is not precisely matched to the trace. I believe the trace is just a 10mil width, with no special considerations. We have just found that ~50 ohm works well without any issues in the digital domain. In the case that you have multiple devices, it would be a good idea to match the trace impedance to the termination resistor, say 50 ohms. Placement near the driver would also be best practice.

    Regards,
    Joel