Part Number: DDC232
Tool/software:
Hi DDC232 team
We are developing DDC232CK board. The conditions are shown below.
Non continuous mode, 20bit output,12.5pC
CLK: 10MHz, DCLK: 20MHz
We are continually analyzing the problem of offset fluctuation problem in non-continuous mode. As the result, we found the following. The CLK number between starting side A integration to the next one fluctuates slightly, the offset fluctuation problem appears.
In addition, we also have the problem of some kind of offset values being chosen randomly after initializing the DDC232 with RESETB.
Could you advise about these conditions and the solution?
Thanks