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ADS1178: ADS 1178

Part Number: ADS1178

Tool/software:

DRDY pin is not going low and hence the conversion seems to be never complete.

Could you help to fix this issue.

  • Hello Krishnamoorthy,

    Welcome to the TI E2E community.

    The ADS1178 is fairly easy to use; there are no internal registers.  As long as the power supplies are correct, you have it configured for SPI and have an active clock connected to the CLK pin, then you should see activity on the /DRDY pin.

    Please verify that the following power supplies are correct:

    AVDD (pins 5, 44, 53, 60):  4.75V to 5.25V

    DVDD (pin 26):  1.65V to 1.95V

    IOVDD (pins 22, 23):  1.65V to 3.6V

    Also ensure that all DGND (7, 21, 24, 25) and AGND (6, 43, 54, 58, 59) are connected together to a common ground plane.

    The CLK pin should have an active CMOS clock, IOVDD voltage level, and should be in the frequency range of 0.1MHz up to 27MHz. 

    For SPI configuration, the FORMAT2 (30), FORMAT1 (31) and FORMAT0 (32) pins need to be connected correctly per Table 10.  If you accidentally configure the ADS1178 for frame-sync mode, then the /DRDY pin will become an input (FSYNC).

    Please send a picture of the schematic showing all ADS1178 connections, and I can review.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • Dear Keith

    Thank you for your response.

    Looks like all the hardware connections and voltage levels are good as specified.

    Checked the SPI configuration and it is 001 SPI mode only.

    PFA below the schematic for your verification. 

    Regards

    Krishnamoorthy

  • Hello Krishnamoorthy,

    Unfortunately, I am not able to view the uploaded image.  You can cut and past a screen shot directly into the e2e post if that is easier.

    Regards,
    Keith

  • We have tried and checked all 

    Looks like DRDY is not asserting low.

    Is there anyway to check the health of ADS1178 IC.

    How to ensure the chip has not failed?

    Regards

    Krish

  • Hello Krishnamoorthy,

    Unfortunately, the picture did still not make it through the system.

    If you can measure the supply current, this is one way to determine if the device is damaged (many times the current will be much higher or lower).

    Also, confirm that pins 30 and 31 are connected to ground and pin 32 is connected to IOVDD for mode 001.  In addition, the TEST pins 8 and 9 must also be connected to ground.  In addition, at least 1 ADC must be powered up; ensure at least 1 of the PWDN inputs is connected to IOVDD (connect all to IOVDD if you want all channels active).  Also make sure the SYNC pin 11 is high, otherwise the internal digital filter is held in reset.

    Regards,
    Keith