ADS4122: digital input drive

Zeev Gerber

Prodigy 110 points

Part Number: ADS4122

Tool/software:

Hi,

The digital input of the ADC didn't have standard voltage level.

The FPGA VOH/VOL at 1.8V didn't support the ADC VIH/VIL.

How ever, the FPGA level is define in +2/-2 ma current drive.

There are no definition of voltage level at low current, which probably the case in the ADC.

pls. advise how to drive this lines?

should I need dedicated external driver for this task?

Regards

Zeev Gerber

1 month ago

0 Geoff Roth 1 month ago

TI__Expert 5430 points

Hi Zeev,

Can you tell me which digital pins you are referring to? The VIH and VIL levels are in the table below (Table 7.8) and can be found on page 14 of the datasheet.

https://www.ti.com/lit/ds/symlink/ads4122.pdf?ts=1752580378514&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADS4122%253FkeyMatch%253DADS4122%2526tisearch%253Duniversal_search%2526usecase%253DGPN-ALT#page=14

Regards,

Geoff

0 Zeev Gerber 1 month ago in reply to Geoff Roth

Prodigy 110 points

the digital input are not standard!!! the FPGA could not drive them!! why you make it like that? who I suppose to drive the ADC???

0 Geoff Roth 1 month ago in reply to Zeev Gerber

TI__Expert 5430 points

Hi Zeev,

Which pins are you referring to exactly? The digital pins are all high impedance so you just need to meet the VIH/VIL levels. Do you have a long trace, fast switching or something else loading down your lines?

Regards,

Geoff

0 Zeev Gerber 1 month ago in reply to Geoff Roth

Prodigy 110 points

hi,

I use reset, sclk, sdata ,sen, oe.

could you confirm the input current of all these pins are less then 100 μA ?

regards

zeev gerber

0 Geoff Roth 1 month ago in reply to Zeev Gerber

TI__Expert 5430 points

Zeev,

They are typically 10uA. Can you give me more information about the issue? Why do you think the FPGA cannot drive the pins, is it b/c the part doens't change state? Have you probed at the device? What does the waveform look like?

Regards,

Geoff

0 Zeev Gerber 1 month ago in reply to Geoff Roth

Prodigy 110 points

Hi,

see the FPGA parameter:

0 Geoff Roth 1 month ago in reply to Zeev Gerber

TI__Expert 5430 points

Zeev,

Yes, I understand that the drive strength is only 2mA. I can not help if you do not tell me what the issue you are see is. Just b/c the VOH/VOL don't match exactly doesn't mean it won't work. The VIL for our device has to get below 0.4V to see a guaranteed logic low and the VIH has to get above 1.3V to get a guaranteed logic high. Between those two it will switch but it is not known whether it is a logic high or logic low.

Regards,

Geoff

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ADS4122: digital input drive