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ADS8332: Impact on not enough Tsu5

Manu Chang
Intellectual 2010 points
Part Number: ADS8332

Tool/software:

Hi team,

My customers had some questions when using ADS8332. They are using them under Va=5V and they found that in some use cases the Tsu5 cannot >=10ns:

1. Project #1 with a 30M SPI, Tsu5=7.5ns

2. Project #2 with a 25M SPI, Tsu5=9.75ns

What could happen, when there is a smaller Tsu5, any method to avoid this?

Besides, what does the 0 after the LSB mean? Meaning the non-valid 0s data after the LSB? 

BR,

Manu

  • 0
    TI__Expert 8876 points

    Hi Manu,

    Thanks for your post. Could you please input into the post notes who the customer is and what their application is?

    Let me check with the design team regarding the t_SU5 timing and get back to you.

    Yes, the 0 will be seen on SDO after the valid data has been output.

    Best regards,

    Samiha

  • 0 in reply to Samiha Sharif
    TI__Intellectual 2010 points

    Hi Samiha,

    Have updated the post notes. Pls let me know if any feedbacks regarding the t_SU5 timing, thanks.

    BR,

    Manu

  • 0 in reply to Manu Chang
    TI__Expert 8876 points

    Hi Manu,

    Thanks! If the setup time (t_SU5) is not sufficient, the last bit may be missed. What sampling speed is the customer using? What mode are they using? If they are using manual trigger mode, it should be okay that the setup time is not met as the last bits are "0" and it is okay to miss these:

    However, if the customer is using auto-trigger mode, they may miss the TAG0 bit (if enabled). In this case, they may try slowing down a bit, as this is increase the t_SU5 allowance and they may stop missing the TAG0 bit. Alternatively, they may use TAG1 and TAG2 to try and decode what TAG0 is. As the tag bits are signifying what channel data is being output, the first time TAG1 turns "1", this may help estimate that the channel is 010 = channel 4, which means the last four data outputs were for channel 0,1,2,3.

    I hope this helps.

    Best regards,

    Samiha

  • 0 in reply to Samiha Sharif
    TI__Intellectual 2010 points

    Hi Samiha,

    Appreciate for your feedback, the answer helps my customers. However, they found out another problem, that during the initialization and configurate the CFR register, the Tsu6 is also smaller than required 10ns. Only during the initialization this Tsu6 is too short, afterwards it is all good.

    Any risks for this too short Tsu6 ? Any method can help fix this?

    BR,

    Manu

  • 0 in reply to Manu Chang
    TI__Expert 8876 points

    Hi Manu,

    Apologies for the delay, I was out of office. 

    Does the customer's t_SU6 timing shortage apply for the below noted instances?

    If so, the same fix may be applied where the SCLK is slowed down. Otherwise, what may happen is the last bit may not be readout by the ADC. If a mode is being used that has trailing zeros, then this may not matter to the customer anyway as this is unnecessary data.

    Best regards,
    Samiha