Tool/software:
Hello,
I am using the ADC3444 chipset and facing an issue with the test pattern output. I am converting the differential output data to single-ended using IBUF, and then using IDDR to capture both rising and falling edge data into a single data stream.
While I am able to correctly receive patterns like 0x2AAA and the alternating 1s and 0s pattern, I am not able to properly capture the 8-point sine wave test pattern and the last two test patterns.
Here are some details of my setup:
- Data rate: 120 MSPS
- Mode: 2-wire interface
- Clocking: Using FCLK and DCLK as per datasheet recommendations
Could you please help me identify what might be causing the issue with the sine wave pattern? Any suggestions on timing alignment, deserialization, or configuration settings would be greatly appreciated.
Thank you