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DAC39J84: Unable to obtain output from DAC39J84

Tai Sim Yeoh
Prodigy 45 points
Part Number: DAC39J84
Other Parts Discussed in Thread: DAC38J84

Tool/software:

Hello TI Support,
         I am working on a system consists of off the shelf board using Xilinx ZU29DR RFSOC paired with Abaco FMC216 with TI DAC39J84 DACs.

         The issue I am currently having is that I could not get any output from the DACs.

My Configuration (Sequencing based on TI "1323.8.3 DAC3xJ8x Start-up Sequence.docx"):

  1. JESD204B Subclass-1 in 2441 configuration (L=2, M=4, F=4, S=1)
  2. 32 frames/multi-frame (i.e. K = 32)
  3. SerDes Line Rate 9.8304 Gbps, w/ interpolation of 8x
  4. DAC config (File attached also)
    1. DACCLKP/N = 491.52 MHz from LMK04828B
    2. Register configs (All values in decimal)
      • Config51: pll_vcosel = 1 (L-Band 4 GHz)
      • Config51: pll_vco = 17
      • Config50: pll_p = 0
      • Config50: pll_m = 15
      • Config49: pll_n = 3
      • Config59: serdes_clk_sel = 0 (DACCLKP/N)
      • Config59: serdes_refclk_div = 0
      • Config60: rw_cfgpll = 20 (i.e. 5x)
      • Config62: rw_cfgrx0 = 0 (Full rate)
      • Config37: clkjesd_div = 2
    3. DACCLK (DAC PLL block output) = 1966.08 MHz
    4. SerDes PLL: 2457.6 MHz
    5. REFCLK for SerDes PLL: 491.52 MHz
    6. JESDclk: 491.52 MHz
    7. SysRef: Continuous 7.68 MHz from LMK04828B
  5. One Xilinx JESD Core + Xilinx JESD Phy connected to one DAC39J84 IC (1 Link, 2 Lanes)
  6. Xilinx JESD Core Clock 245.76 MHz
  7. LMK04828B Reference clock: 122.88 MHz
  8. DAC samples formatted in MSB first before transmission

What I've confirmed

  1. CGS completed successfully without errors/alarms
  2. ILA completed successfully without errors/alarms
  3. SYNCB line is toggled at expected times (i.e. Before CGS starts, after CGS completes). No lane reinitialization due to link errors observed upon successful link initialization; i.e. Link is stable
  4. SYSREF frequency is 7.68 MHz (measured on scope)
  5. PASSED NCO tests (per TI "7534.SYSREF trouble-shooting.docx") for ALL DACS and DAC channels
  6. Confirmed Xilinx JESD Core implementation is transmitting DAC samples in MSB then LSB format.
  7. No errors/alarms reported on Lane0 and Lane1 on the DAC (i.e. Config65, Config100, Config101, Config108)
  8. No errors reported on the Xilinx JESD Core (i.e. STAT_STATUS Register 0x60, STAT_LINK_ERR_CNT Register 0x420/0x4A0)

         I have been struggling on this "No DAC output" problem for many weeks now.

Any help you can provide is greatly appreciated.

TI references used:

  1. 4188.DAC38J84 Clock, PLL and SERDES Configuration.docx
  2. 1323.8.3 DAC3xJ8x Start-up Sequence.docx
  3. 7534.SYSREF trouble-shooting.docx

    Fullscreen DAC0_forTI.txt Download 
    Dumping DAC 0 Register values
DAC 0 Register: 0x00 (0) Value: 0x0418 (0000 0100 0001 1000b)
DAC 0 Register: 0x01 (1) Value: 0x00a0 (0000 0000 1010 0000b)
DAC 0 Register: 0x02 (2) Value: 0x2082 (0010 0000 1000 0010b)
DAC 0 Register: 0x03 (3) Value: 0xa300 (1010 0011 0000 0000b)
DAC 0 Register: 0x04 (4) Value: 0xfcfc (1111 1100 1111 1100b)
DAC 0 Register: 0x05 (5) Value: 0xef06 (1110 1111 0000 0110b)
DAC 0 Register: 0x06 (6) Value: 0xfcfc (1111 1100 1111 1100b)
DAC 0 Register: 0x07 (7) Value: 0x3701 (0011 0111 0000 0001b)
DAC 0 Register: 0x08 (8) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x09 (9) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x0a (10) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x0b (11) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x0c (12) Value: 0x0400 (0000 0100 0000 0000b)
DAC 0 Register: 0x0d (13) Value: 0x0400 (0000 0100 0000 0000b)
DAC 0 Register: 0x0e (14) Value: 0x0400 (0000 0100 0000 0000b)
DAC 0 Register: 0x0f (15) Value: 0x0400 (0000 0100 0000 0000b)
DAC 0 Register: 0x10 (16) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x11 (17) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x12 (18) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x13 (19) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x14 (20) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x15 (21) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x16 (22) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x17 (23) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x18 (24) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x19 (25) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x1a (26) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x1b (27) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x1c (28) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x1d (29) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x1e (30) Value: 0x4444 (0100 0100 0100 0100b)
DAC 0 Register: 0x1f (31) Value: 0x4440 (0100 0100 0100 0000b)
DAC 0 Register: 0x20 (32) Value: 0x4044 (0100 0000 0100 0100b)
DAC 0 Register: 0x21 (33) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x22 (34) Value: 0x1b1b (0001 1011 0001 1011b)
DAC 0 Register: 0x23 (35) Value: 0xffbf (1111 1111 1011 1111b)
DAC 0 Register: 0x24 (36) Value: 0x0030 (0000 0000 0011 0000b)
DAC 0 Register: 0x25 (37) Value: 0x4000 (0100 0000 0000 0000b)
DAC 0 Register: 0x26 (38) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x27 (39) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x28 (40) Value: 0x0003 (0000 0000 0000 0011b)
DAC 0 Register: 0x29 (41) Value: 0xffff (1111 1111 1111 1111b)
DAC 0 Register: 0x2a (42) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x2b (43) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x2c (44) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x2d (45) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x2e (46) Value: 0xffff (1111 1111 1111 1111b)
DAC 0 Register: 0x2f (47) Value: 0x0004 (0000 0000 0000 0100b)
DAC 0 Register: 0x30 (48) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x31 (49) Value: 0x641c (0110 0100 0001 1100b)
DAC 0 Register: 0x32 (50) Value: 0x0f00 (0000 1111 0000 0000b)
DAC 0 Register: 0x33 (51) Value: 0xa37c (1010 0011 0111 1100b)
DAC 0 Register: 0x34 (52) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x35 (53) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x36 (54) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x37 (55) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x38 (56) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x39 (57) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x3a (58) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x3b (59) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x3c (60) Value: 0x1028 (0001 0000 0010 1000b)
DAC 0 Register: 0x3d (61) Value: 0x0088 (0000 0000 1000 1000b)
DAC 0 Register: 0x3e (62) Value: 0x0108 (0000 0001 0000 1000b)
DAC 0 Register: 0x3f (63) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x40 (64) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x41 (65) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x42 (66) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x43 (67) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x44 (68) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x45 (69) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x46 (70) Value: 0x0044 (0000 0000 0100 0100b)
DAC 0 Register: 0x47 (71) Value: 0x190a (0001 1001 0000 1010b)
DAC 0 Register: 0x48 (72) Value: 0x31c3 (0011 0001 1100 0011b)
DAC 0 Register: 0x49 (73) Value: 0x5500 (0101 0101 0000 0000b)
DAC 0 Register: 0x4a (74) Value: 0x0301 (0000 0011 0000 0001b)
DAC 0 Register: 0x4b (75) Value: 0x1c03 (0001 1100 0000 0011b)
DAC 0 Register: 0x4c (76) Value: 0x1f01 (0001 1111 0000 0001b)
DAC 0 Register: 0x4d (77) Value: 0x0300 (0000 0011 0000 0000b)
DAC 0 Register: 0x4e (78) Value: 0x0f0f (0000 1111 0000 1111b)
DAC 0 Register: 0x4f (79) Value: 0x1cc1 (0001 1100 1100 0001b)
DAC 0 Register: 0x50 (80) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x51 (81) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x52 (82) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x53 (83) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x54 (84) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x55 (85) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x56 (86) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x57 (87) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x58 (88) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x59 (89) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x5a (90) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x5b (91) Value: 0x00ff (0000 0000 1111 1111b)
DAC 0 Register: 0x5c (92) Value: 0x1115 (0001 0001 0001 0101b)
DAC 0 Register: 0x5d (93) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x5e (94) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x5f (95) Value: 0x0123 (0000 0001 0010 0011b)
DAC 0 Register: 0x60 (96) Value: 0x4567 (0100 0101 0110 0111b)
DAC 0 Register: 0x61 (97) Value: 0x0001 (0000 0000 0000 0001b)
DAC 0 Register: 0x62 (98) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x63 (99) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x64 (100) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x65 (101) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x66 (102) Value: 0xb00a (1011 0000 0000 1010b)
DAC 0 Register: 0x67 (103) Value: 0xef0b (1110 1111 0000 1011b)
DAC 0 Register: 0x68 (104) Value: 0xce06 (1100 1110 0000 0110b)
DAC 0 Register: 0x69 (105) Value: 0x7507 (0111 0101 0000 0111b)
DAC 0 Register: 0x6a (106) Value: 0x220e (0010 0010 0000 1110b)
DAC 0 Register: 0x6b (107) Value: 0xf60f (1111 0110 0000 1111b)
DAC 0 Register: 0x6c (108) Value: 0x0006 (0000 0000 0000 0110b)
DAC 0 Register: 0x6d (109) Value: 0x00e0 (0000 0000 1110 0000b)
DAC 0 Register: 0x6e (110) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x6f (111) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x70 (112) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x71 (113) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x72 (114) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x73 (115) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x74 (116) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x75 (117) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x76 (118) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x77 (119) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x78 (120) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x79 (121) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x7a (122) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x7b (123) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x7c (124) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x7d (125) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x7e (126) Value: 0x0000 (0000 0000 0000 0000b)
DAC 0 Register: 0x7f (127) Value: 0x800a (1000 0000 0000 1010b)
DAC 0 Register: 0x80 (128) Value: 0x0418 (0000 0100 0001 1000b)
Script Completed: 2025-07-24 11:08:29.333475
CommClientSocket destroyed
  • 0
    TI__Mastermind 38690 points

    Hi Tai,

    Can you please send us a copy of your schematic?

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 45 points

    Hello Rob,

           Thank you for the reply. Is there a way to securely share with you the information? I tried to message you via the TI E2E site, however I am prevented to message you directly due to your profile settings.

            Thank you.

    Tai

  • 0 in reply to Tai Sim Yeoh
    TI__Mastermind 38690 points

    Hi Tai,

    Do you have 50 or 100ohms on each P/N output leg to ground on the DAC?

    If not, there will be no output. 

    Please advise you already have this first.

    Thanks,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 45 points

    Hello Rob,
         Unfortunately Abaco (previously 4DSP) did not share with us their schematics for FMC216; i.e. their company policy is what I'm told. 
         I currently only have schematics for our main board (where the Xilinx FPGA resides) and a splitter board.

         Having said that, is it correct to say the missing resistor is not the issue based on the items I have confirmed below?

         1. The NCO Test passed (i.e. DAC is outputting signal and can be measured externally by an oscilloscope and RF cable loopback to an ADC in our system)

         2. Tested the same configuration by swapping different FMC216 modules (i.e. to confirm we did not have a lemon on hand)

         3. The FMC216 module has been out in the market and widely used for close to a decade now (i.e. any design issue would've surface and fixed. Production related issue would be have been confirmed by #2 above)

         Is there any other things we can try to debug the issue? Is there a reserve register on the DAC I can read to confirm waveform data from the FPGA is received by the DAC?

         Again thank you for your help. 

    Regards,

    Tai

  • 0 in reply to Tai Sim Yeoh
    TI__Mastermind 38690 points

    HI Tai,

    So you are saying this is not your board design, nor is it the TI EVM that you are evaluating and the DAC is in an Abaco module?

    If so, then I would need you to go back to Abaco and discuss this configuration issue. Maybe their board doesn't allow for this specific config and sampling rate, etc.

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 45 points

    Hello Rob,
            Thank you again for answering.

            Re: not your board design, nor is it the TI EVM that you are evaluating and the DAC is in an Abaco module?
            Yes you are correct that 
             a) Our design is not using a TI EVM
             b) DAC is within Abaco/4DSP's design

             We are in the process of getting assistance from Abaco/Ametek however due to their acquisition, support on their end is held up a little and we are hoping that with your expertise on your product you can provide some pointers/direction on what could potentially be the cause?

             I managed to also get the Link layer tests to PASS, hence it gives me some confidence that the JESD link is working and stable.

             With all the other tests passing, I suspect it is just maybe my configuration is a little borked due to unfamiliarity with the DAC.

              Is there anything on the DSP blocks side inside the DAC that could possibility contribute to no output from the DAC?

              Thank you again for your help.

    Regards,

    Tai

      

  • 0 in reply to Rob Reeder
    Prodigy 45 points

    Hello Rob,
              Just a quick update after my last reply.

              I managed to get the DAC to output signal today however the DAC configuration I changed to get it working confused me.

             The change I did was in Config73 (0x49). I had to assign ALL lanes to Link 0 even though the design only uses 2 lanes (Lane 0 and Lane 1). 
             Is there any documentation (e.g. errata, application notes etc) that explains why this would be so?

             After getting the DAC to output, now the issue I am troubleshooting is that the frequency of the DAC output is 10x slower than the data I loaded (e.g. a 50 MHz waveform is output as 5 MHz). I have verified that the data generated and loaded to the DAC is as expected (i.e. If a 50 MHz waveform is desired, data generated is for 50 MHz and data transmitted to the DAC is 50 MHz).

              Any idea what would be the cause?

              Again thank you for your help in advance.

    Regards,

    Tai

  • 0 in reply to Tai Sim Yeoh
    TI__Mastermind 38690 points

    Hi Tai,

    Looks like you are making progress.

    Let me look into this for you and I will get back with you in a few days.

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 45 points

    Hello Rob,
           Thank you again for your patience and quick reply.

           Re: My query of DAC output being slower
           Managed to find the root cause of the issue. Turned out to be waveform generator issue.

           Re: Why I need to configure ALL lanes to Link 0 to get DAC output
           I will wait for your reply on why the configuration fixes the no DAC output issue.

           Thank you.

    Regards,
    Tai

  • 0 in reply to Tai Sim Yeoh
    TI__Mastermind 38690 points

    Hi Tai,

    If the NCO only mode has the correct output then the problem might be the way the pattern is sent to the DAC.

    Can you please double check this?

    The DAC does not have a 1/10 output frequency mode.

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 45 points

    Hello Rob,
           Thank you for the reply.

           I think the remaining question on the thread was the question below (Refer to Aug 5 reply)

            Re: Why I need to configure ALL lanes to Link 0 to get DAC output

            Thank you again for your support.

    Regards,

    Tai

  • 0 in reply to Tai Sim Yeoh
    TI__Mastermind 38690 points

    Hi Tai,

    The DAC and FPGA would need to be setup with two links. Otherwise, the DAC needs to be configured for one link to work.

    Regards,

    Rob