ADS9811: Questions to understand ADS9811 well

Part Number: ADS9811
Other Parts Discussed in Thread: ADS9815

Tool/software:

Hi team,

There are several questions. Could you please support these?

1. Regarding synchronization by using SMPL_SYNC pin, is it OK that the signal is required to the pin at just one time as described in the datasheet below? 

2. Does the device has oversampling function?

3. tDCLK at DDR mode is 10nsec at min, that is the frequency is 100MHz. Do you recommend to make the fequecny less than 100MHz considering the margin like  temperature variance and so on?

4. Does the device has any functions to adjsut gain value, phase and offset value after data conversion? 

Regards,

Noriyuki Takahashi

  • Hi Takahashi-san,

    Thanks for your question. Could you please enter in the notes section which customer name, project/application, timeline this is regarding?

    1. Yes, the SMPL_SYNC pin only needs to be applied once after power-up to synchronize the channel outputs with the FCLKOUT signal.
    2. Yes, the device does have oversampling (simple average) by a factor of 2x. It can be accessed using the below register:
    3. DCLKOUT is provided by the ADC so the user does not need to provide this signal.
    4. The ADS9811 has a PGA on the front-end that may be used to set the appropriate range:
      1. The device does not have any additional phase or offset calibration, but this may be calibrated for at a system level as shown in this video: https://www.youtube.com/watch?v=zARSuyJtHYg

    Best regards,

    Samiha

  • Hi Samiha

    They have additional questions.

    5. How long does it take from the moment the device starts sending the conversion data to the moment it finishes sending the all conversion data? 

    For example, in case of  4-SDO DDR CMOS Data Interface, Is it 24 DCLKs like figure 5-2 in the datasheet?

    6. In the datasheet, there are no information of ADS9811 about Data Clock Frequency for Interface Modes in Table 6-9. Could you tell the information of ADS9811?

    7. Regarding data averaging, is the understanding below correct?

    Three points are possible for a simple average and two points are possible for a moving average.

    8. Could you tell how long it takes from the data sampling to finishing to send the conversion data?

    9. Is it possible to achieve 4-points averaging inside the device within 5usec?

    Regards,

    Noriyuki Takahashi

  • This is kind reminder. Couldy you support this?

  • Hi Takahashi-san,

    Thanks for your post. I was out of office last week, sorry for the delay. Here are my responses:

    5) Yes, this timing will depend on what mode the device is being operated in. Yes, it is 24DCLKs in 4-SDO DDR mode.

    6) Sorry for the confusion. The ADS9815 timings apply to the ADS9811 device.

    7) In simple average mode: first sample (s1) is a average of n and n+1 data. Next sample (s2) is average of n+2 and n+3 data. For each averaged output, two data sets need to be sampled, so data rate is reduced by factor 2.

    In moving average mode, each sample is the average of current sample (n) and previous sample (n-1). Additional data is not sampled, so data rate is not reduced.

    8) In simple average mode, the data will take double the time as shown in bullet (5). So for 4-SDO DDR mode, it will take 48DCLKs, or instead of 1MSPS, data rate will be reduced to 500ksps. 

    In moving average, the data rate will remain 1MSPS.

    9) The device is currently only capable of doing 2 point averaging. What is the urgency of 4 point averaging? I can check with the team if this is possible. Does customer need 4 point moving average or simple average?

    Best regards,

    Samiha

  • Samiha

    Thanks! I will confirm the urgency of 4-point averaging.

    What does "ENABLE SIMPLE AVERAGE" in table 6-10 mean? I thought "3" means that the device can support 3-point averaging in simple average.

    Regads,

    Noriyuki Takahashi

  • Hi Takahashi-san,

    This table is showing what values to write into these registers to enable simple average mode. 6 registers, as shown in the Table 6-10, must be written to enable or disable simple average mode. All of these writes will enable averaging by a factor of 2.

    Best regards,

    Samiha