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ADC12DJ3200QML-SP: Periodic SYSREF Coupling Issues

Pratik Aher
Prodigy 10 points

Part Number: ADC12DJ3200QML-SP
Other Parts Discussed in Thread: LMK04832-SP

Tool/software:

Dear all,

We are facing a problem due to the coupling of ADC SYSREF signal (continuous periodic) with the ADC. We conclude this with the help of following observations:

1) A block within the FPGA which is responsible for doing 8b10b decoding fails whenever the SYSREF of the ADC is ON. This happens in very random interval of time.

2) When the SYSREF is turned OFF after the JESD initialization, the data is consistent every time and no glitches are found.

Section 8.1.4.2 of the datasheet mentions that the SYSREF period should be set to long enough to limit spurious performance degradation caused by coupling. We also tried increasing the SYSREF period, but it did not work.

ADC Sampling Frequency = 1474.56 MHz

ADC SYSREF Frequency = 0.36864 MHz

This issue is been observed in only one of the five ADCs assembled on the same PCB Card. The other ADCs works well even when the SYSREF is running.

Can anyone suggest some debug steps to resolve this issue?

  • 0
    TI__Mastermind 45670 points

    Hi Pratik,

    Seems like the sysref is not being sampled correctly and it is causing the device to get constantly re aligned which is making the link go down and cause the errors they see.

    Can you please check register 0x208 to confirm this in the device?

    Regards,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 10 points

    Hi Rob,

    Yes Exactly, we verified the JESD_STATUS register and found that the SYSREF was getting realigned repeatedly. We also found that the SYSREF_POS register values were fluctuating for the ADCs which has this issue. But the value of SYSREF_POS was constant for the other ADCs which does not has this issue. 20 consecutive readings of SYSREF_POS register were taken after the Auto SYSREF Calibration was completed to conclude the above findings.

    SYSREF signal is generated using LMK04832-sp running in clock distribution mode.

    Can you highlight some possible causes of this issue and how can we rectify it?

    Regards,

    Pratik.