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ADC12DJ5200RFEVM: LMK61e2 Clock generation failed after programing EEPROM through ADCxxDJxx00RF EVM GUI

Part Number: ADC12DJ5200RFEVM
Other Parts Discussed in Thread: LMK61E2

Tool/software:

Hi,

I am using evaluation board  ADC12DJ5200RFEVM with ADCxxDJxx00RF EVM GUI.

Initially, the LMK61E2 chip was successfully configured using the ADCxxDJxx00RF EVM GUI by writing to registers other than EEPROM registers. And, clocks were generated correctly.

However, to have a fixed clock output after every power cycle, the internal EEPROM was programmed following the procedure described in sections 7.5.4 and 7.5.5 of the LMK61E2 datasheet using EEPROM registers in ADCxxDJxx00RF EVM GUI.

After the power cycle,

1. Clocks are not generated.

2. While trying to read the LMK61E2 registers, readback always return 0xFFh.

3. We are unable to write to any of the registers of LMK61E2 chip.

Kindly provide support to resolve this issue.

Best regards,
Karthik

  • Hi Karthik, 

    It sounds like the I2C address in R8 may have been overwritten when you programmed the EEPROM. Can you scan the I2C bus to see if the device responds to a different address? 

    Regards, 

    Connor 

  • Hi Connor Lewis,
    Thank you for the suggestion. Now we are able to scan I2C bus and found the new device address.

    1. With New device address we configured the LMK61e2 chip but failed to generate clock from LMK61e2 Chip.
    When we read register R66(init_live - which is suppose show lock and calibration status) it returns value 0xCA. The value shows the chip is not calibrated and locked. If locked properly, what should this reqister reflect?

    2. We read EEPROM and found few address holding reserved bits got changed.
    EEPROM address where reserved bits got changed are listed below:
    0x00 => 8D
    0x01 => 24
    0x02 => 36
    Can you please provide default bit mapping in EEPROM?

    3. When we tried to write default values, we are able to change the data in EEPROM other than the addresses (0x00, 0x01, 0x02) which are reserved location.
    Please help us to write default values to EEPROM.

    4.Is there any chance to disable EEPROM form configuring LMK61E2 chip on power on?

    LMK61E2 register configuration
    0x00 0x10
    0x01 0x0B
    0x02 0x33
    0x08 0xB0
    0x09 0x00
    0x10 0x00
    0x11 0x80
    0x15 0x02
    0x16 0x00
    0x17 0x20
    0x18 0x00
    0x19 0x00
    0x1A 0x32
    0x1B 0x00
    0x1C 0x00
    0x1D 0x00
    0x1E 0x00
    0x1F 0x00
    0x20 0x04
    0x21 0x0C
    0x22 0x28
    0x23 0x03
    0x24 0x08
    0x25 0x00
    0x26 0x00
    0x27 0x00
    0x2F 0x00
    0x30 0x00
    0x31 0x10
    0x32 0x00
    0x33 0x00
    0x34 0x00
    0x35 0x00
    0x38 0x00
    0x48 0x02

  • Hi Karthik, 

    I've attached the register defaults from the factory for LMK61E2 here, can you try loading these values and re-programming the EEPROM to see if the device can lock? R66 should read back as 0x00 if calibration has finished and the device is locked. 

    Unfortunately there is no way to disable loading the EEPROM contents at startup. 

    Regards, 

    Connor 

    Addr	Res
    0x00	0x10
    0x01	0x0B
    0x02	0x33
    0x03	0x00
    0x04	0x00
    0x05	0x00
    0x06	0x00
    0x07	0x00
    0x08	0xB0
    0x09	0x00
    0x0A	0x01
    0x0B	0x00
    0x0C	0x42
    0x0D	0xA3
    0x0E	0x00
    0x0F	0x05
    0x10	0x00
    0x11	0x80
    0x12	0x02
    0x13	0x00
    0x14	0x00
    0x15	0x01
    0x16	0x00
    0x17	0x20
    0x18	0x00
    0x19	0x00
    0x1A	0x32
    0x1B	0x00
    0x1C	0x00
    0x1D	0x00
    0x1E	0x00
    0x1F	0x00
    0x20	0x01
    0x21	0x0C
    0x22	0x28
    0x23	0x03
    0x24	0x28
    0x25	0x00
    0x26	0x00
    0x27	0x00
    0x28	0x00
    0x29	0x58
    0x2A	0x09
    0x2B	0x10
    0x2C	0x10
    0x2D	0x10
    0x2E	0x10
    0x2F	0x00
    0x30	0x00
    0x31	0x10
    0x32	0x00
    0x33	0x00
    0x34	0x00
    0x35	0x00
    0x36	0x00
    0x37	0x00
    0x38	0x00
    0x39	0x00
    0x3A	0x00
    0x3B	0x00
    0x3C	0x00
    0x3D	0x00
    0x3E	0x00
    0x3F	0x00
    0x40	0x00
    0x41	0x00
    0x42	0x00
    0x43	0x00
    0x44	0x00
    0x45	0x08
    0x46	0x0C
    0x47	0x00
    0x48	0x00
    0x49	0x00
    0x4A	0x00
    0x4B	0x10
    0x4C	0x00
    0x4D	0x00
    0x4E	0x00
    0x4F	0x00
    0x50	0x00
    0x51	0x00
    0x52	0x00
    0x53	0x00
    0x54	0x00
    0x55	0x00
    0x56	0x00
    0x57	0x00
    0x58	0x00
    0x59	0x00
    0x5A	0x00
    0x5B	0x00
    0x5C	0x00
    0x5D	0x00
    

  • Hi Connor Lewis,
    Thank you for sharing the register defaults from the factory for LMK61E2. We loaded these register and reprogramed the EEPROM, Now R66 returns value 0xC8.

    When we are trying to load these default registers of LMK61E2, few registers are not getting overwritten.
    Attached text file contains registers which are not changing :

     reg_addr    wr_data    rd_data 
       0x03   =>  0x00   =>  0x02
       0x04   =>  0x00   =>  0x8D
       0x05   =>  0x00   =>  0x24
       0x06   =>  0x00   =>  0x36
       0x2F   =>  0x00   =>  0x61
       0x30   =>  0x00   =>  0x27
       0x32   =>  0x00   =>  0x61
       0x34   =>  0x00   =>  0x24
       0x35   =>  0x00   =>  0xBF
       0x3D   =>  0x00   =>  0xA8
       0x3E   =>  0x00   =>  0xC8
       0x3F   =>  0x00   =>  0x1A
       0x42   =>  0x00   =>  0xC8
       0x43   =>  0x00   =>  0x02
       0x44   =>  0x00   =>  0x7B
       0x4C   =>  0x00   =>  0x80
       0x50   =>  0x00   =>  0x04
       0x53   =>  0x00   =>  0xC0
       0x55   =>  0x00   =>  0xC4
       0x56   =>  0x00   =>  0xC4
       0x5B   =>  0x00   =>  0x22
       0x5C   =>  0x00   =>  0x02 
     


    Can you please share the default EEPROM data of LMK61E2 chip?

  • Hi Karthik, Sorry for delay - Connor has been OoO. 
    He will return Monday - expect an update then. 

    Best regards, 

    Vicente 

  • Hi Karthik, apologies for the delayed response here. Some of these registers are not user overwritable, so it's expected that they are not matching the factory default values (ex: R47 NVMSCRC is computed when burning the EEPROM and will not be overwritten with the default value of 0x00). Is the device able to lock and output the correct frequency now that you've reprogrammed the EEPROM with the default values? 

    Regards, 

    Connor 

  • HI Connor Lewis,

    Thank you for the response.

    We have assumed the default registers configuration is to generate 156.25MHz from LMK61E2 chip.

    We are not getting the lock and 156.25MHz is not generated from the chip.

    The registers other than the registers related to the EPPROM mentioned in the above txt file are also not overwritten, Why it is not changing and whether it is effecting clock generation?

    Best regards

    Karthik

  • Hi Karthik, 

    Looking through your list of registers that are not overwritten, it looks like many of these fields are write-protected and can't be overwritten in EEPROM through register commit to SRAM. 

    R66 reads back as 0xC8 which indicates the LOL and CAL status are 0, so I would expect the device should be able to lock. What output format is the device configured for on your board? The factory default resets the output type to LVPECL, so if you don't have emitter resistors in the DC path you may not see an output. 

    If you program the registers to configure the LMK61E2 using the ADCxxDJxx00RF EVM GUI are you able to see an output clock? 

    Regards, 

    Connor 

  • Hi Connor Lewis,

    We tried to program 160MHz from LMK61E2 chip using ADCxxDJxx00RF EVM GUI and able to read back register R66 as 0xC8, But we are not able to see clock generated from chip.
    We are using LVDS IO standard for Clock generated from chip and for that we are configuring regsister R21 with value 0x2.

    Thanks
    Karthik.A

  • Hi Karthik, 

    I've reached out to our team to get the default EEPROM image programmed to the device in the factory. Once I have that, I can send some additional instructions for programming the SRAM/EEPROM directly instead of through register commit. Hopefully that can reset the device to the factory default. I should be able to get back to you sometime next week. 

    Regards, 

    Connor 

  • Hi Connor Lewis,

    Any update about default EEPROM image used to program device in factory???

    Regards,

    Karthik A

  • Hi Karthik, 

    Thanks for the reminder, let me check in with our test team to see if they have any updates. Thanks for your patience here. 

    Regards, 

    Connor 

  • Hi Karthik, 

    Just wanted to give a quick update here. Our test team was not able to retrieve the factory default EEPROM image for LMK61E2. I went ahead and ordered some samples, I'll read back the EEPROM contents directly and share the default image loaded to the device. I should be able to get back to you next week with the default EEPROM image. 

    Regards, 

    Connor 

  • Hi Karthik, 

    See the attached file for the default EEPROM contents for LMK61E2. You can try writing these values to SRAM/EEPROM following the procedure in section 7.5.4 and 7.5.5 of the datasheet. If the device still hasn't recovered after loading the factory default image, then most likely it will need to be replaced. Let me know if this works. 

    Regards, 

    Connor 

    LMK61E2_Default_EEPROM.xlsx

  • Hi Connor Lewis,

    Thank you for Sharing the default EEPROM map of LMK61E2 chip.

    After programing EPPROM by following the procedure mentioned in section 7.5.4 and 7.5.5 of the datasheet.
    Now we are able to configure LMK61E2 chip using ADCxxDJxx00RF EVM GUI and PLL lock is asserted.

    Thank you for your all time Support.

    Regards,
    Karthik A

  • Hi Karthik, 

    Great, I'll go ahead and mark this thread as resolved. If you need any other support feel free to open up a new thread.