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ADS7046: Input capacitance of SCLK-pin

Yuto Kitamura
Expert 6535 points
Part Number: ADS7046

Tool/software:

Dear team,

Would I know how much is the input capacitance of SCLK-pin?

The background of this question is because we are considering tie multiple ADS7046 to 1 clock source from MCU, about 10 to 30pcs with 15MHz. I understood it also depends on MCU pin drive capability and layout parasitic capacitance but I like to know how much ADS7046 can be driven by 1 clk source.

Similarly can I know the drive capability of SDO-pin and let me know how much ADS7046 can be tied to same bus?

best regards,
Yuto Kitamura

  • 0
    TI__Genius 14960 points

    Hi Kitamura-san,

    SCLK of the ADS7046 has a max capacitance of 2.168pF. The amount of devices that can be connected together reliably depends on the drive strength of the controller as well. I recommend using the IBIS model of the device to aid in this analysis, as it will also heavily rely on the PCB layout. I would expect it to be difficult to get more than 10 devices working at clocks greater than 10MHz. 

    The same thing goes for the SDO pin, which has a max capacitance of 2.523pF. Signal integrity analysis tools should be used along with the IBIS model to verify the design beforehand.

    Regards,
    Joel

  • 0 in reply to Joel Meraz
    TI__Expert 6535 points

    Hi Joel,

    Thank you! And would I know the output current capability (drive capability) of SDO as well?

    The detail will be evaluated with IBIS.

    Best regards,
    Yuto

  • 0 in reply to Yuto Kitamura
    TI__Genius 14960 points

    Hi Kitamura-san,

    Apologies for not getting back to this earlier.

    We only specify up to 2mA of output current for the digital input and output pins. 

    Regards,
    Joel