Tool/software:
Dear experts：
Only the following registers are configured, can the test mode be executed, but my ILA test with the FPGA shows that it does not match what I expected
24'h01_0014
24'h02_8000
24'h04_0010
I do a reset and wait for 100ns, and the data written by SPI is read back normally, after the configuration is completed, the first eight channels of data and the Fclk clock are incorrect, do you think there will be other problems?
I would appreciate it if you could respond soon.
huang
