Part Number: ADC12DJ5200-SP
Tool/software:
Hi all,
My customer Olivia has a question.
"Regarding the 8-bit mode (JMODE 5). We’re exploring this as a lower power option and one that requires lower lane rates from the ADC to the FPGA. During our testing, we’re capturing the “raw” ADC data from our FPGA and am seeing some odd behavior. In the screenshots below, you can see a sine wave clearly at ~5MHz. However, upon zooming into the waveform you can see discontinuous points that make up the sine wave. This results in a poor spectral plot once it goes through our FFT.
We’ve verified the design at JMODE0 (12bit, 8b/10b) and JMODE40 (12 bit, 64b/66b). Does your team have any tips for debugging this in the 8-bit mode? Are there any considerations with the frames or data ordering that we need to be concerned with?"
Thanks,
Lauren
