ADS8528: Serial data output glitch

Part Number: ADS8528

Tool/software:

We are using the ADS8528 in HW configuration mode with serial data transfers.

See schematic for SPI connections.

From the datasheet, it appears the ADS8528 channels (CH_A0, CH_A1, CH_B0, CH_B1, CH_C0, CH_C1, CH_D0, CH_D1) are grouped as pairs and the data can be off-loaded serially in pairs via the SDO_A, SDO_B, SDO_C, and SDO_D outputs.  Our design is configured to output all 8 channels serially via the SDO_A output.

 

When reading the serial data output, there appears to be a “glitch” at the 32-bit and 64-bit boundary of the data transfer.

I have attached scope plots of the SPI clock and serial data output at SDO_A.  While we are sampling all 8 channels, for this instance, we only read the first four channels (CH_A0, CH_A1, CH_B0, CH_B1).  Therefore, these plots display groups of 64-bit transfers (channels CH_A0, CH_A1, CH_B0, and CH_B1).

 

Could the ADS8528 be the source of the “glitch”?

Is it possible that the glitch is an artifact of the ADS8528 any internal register switching that allows all channels to be output via the single SDO_A port?

  • Hi David,

    It's been a little while!  Happy to see that you are still working with the ADS8528.  So you've decided to go with the single SDO - did you ever get the 128 bit transfer to work?  I don't recall ever seeing that glitch before - are the actual conversion results as expected otherwise?  The glitch may be an artifact of the internal shift register loading the next data-set into the serial output buffer.  Do you still see it if you speed up the SCLK?

  • Hi Tom - thanks for fast response again,

    We were using the ADS8528 with 32-bit transfers with success until an issue developed with erroneous bit errors (probably related to my previous inquiry).  We are attempting to go back to 128-bit transfers and speed our clocking up to 12.5MHz.

    Our circuit design includes an isolator in the SPI communication path to the ADS8528.  We traced the error to a glitch input to the isolator data line from the ADS8528 data output.  The isolator datasheet mentions a susceptibility to glitches less than 10nsec wide causing latching behavior (up to 4usec) at the isolator output.  The glitch at the end of a 32-bit transfer typically was only seen if the previous bit value was low.  If low, the low to high glitch into the isolator presented as a high value output at the beginning of the next data word for 4usec, causing data corruption into our processor (see attached scope plot).  If the previous bit value was high, the glitch would be obscured by an already high data-line out of the ADS8528.  

    While the isolator is susceptible to the glitch behavior and we will need to filter the data line into it, I was wanting to confirm if the ADS8528 could be the source.  I thought the issue could be with PCBA signal layout/routing, but we have two different PCBA designs with the ADS8528 coupled with the isolator exhibiting the same behavior.

    Does the SPI data output line require a pull-down resistor to alleviate the glitch?

    The data output from the ADS8528 is correct, just the accompanying glitch is impacting the operation of our isolator and corrupting data.

    We have sped up the clock to 12.5MHz and still see the glitch.  Our isolator is limited to a maximum 12.5MHz clock operation.  It occurs at 8MHz and 12.5MHz.

    Thanks again for your help

  • Hi David,

    Can I ask which isolator you are using?  You can try a pull-down on SDO, but a serial R and small C to ground might work as well.

  • Mike,

    We are using ADUM4152BRIZ for isolation and added a low pass RC-filter at the isolator input to reduce the glitch.  A pull-down resistor had no affect.  Just wanted confirmation that the glitch output could be sourced from the ADS8528, as you mentioned.

  • OK - thank you!  You mentioned earlier that there were 'other parts' sharing the SPI bus, can you provide a schematic or tell me what those are?  Also, are you using the A grade or B grade of the isolator chip?

  • Tom,

    The DACs sharing the SPI bus are AD5620CRMZ-2 - these do not have an SDO line.  The ADS8528 SDO is the only MISO line feeding our processor.  We are using the "B" grade isolator.  We have implemented filtering of the serial data line to the isolator to reduce the glitch and alleviate the latching output.  I just wanted to confirm if the ADS8528 could be a source of the glitch we are seeing.