ADS7142: ADS7142IRUGR Temperature Dependent and Bootup Specific Offset Error

Part Number: ADS7142

Tool/software:

Hi!

We have observed two different voltage offset levels during bootup of ADS7142, that persists while the device is powered on, despite offset calibrations/software resets. These levels are 16 LSB apart, and the probability of  the specific offset level occurring seems to depend on temperature. This offset seems to be very consistent and reproducible across different devices and even platforms, and translates to approximately 500uV after conversion. The offset is shared between the channels of a converter, but not between different converter units. Otherwise the offset calibration seems to be accurate up to 1 bit level.

Below are some plots of the phenomenon. Note the difference in behavior when rebooting the device during test in Fig. 2. and when the device is powered for the full duration of the test in Fig. 3.

Fig. 1. Plot of a temperature sweep from 45degC to -10degC. The device is powered on and off periodically. AD1 is connected to GND and AD2 measures a node between two resistors. The resistors appear to have some temperature dependency.

 

Fig. 2. Temperature measurements utilizing AD7142 AD converter. The device is powered on and off periodically. Voltage offset levels can be seen switching polarity based on temperature. 

Fig. 3. Temperature measurements while the device is constantly powered on. The offset levels appear stable despite offset calibrations and software resets.

Here is our schematic around the AD converter. Note it is not possible for us to monitor the BUSY/RDY line.

Fig. 4. Schematic around the converter. 

We have tried the solutions provided in TI forums, but to no avail (software resets etc.) Furthermore, the phenomenon has been observed even when supplying ADS7142 power with a power supply. Different capacitor configurations around the converter has also been tried. This seems to have some effect on the distribution of to which offset the converter settles, but the phenomenon is observable nevertheless.

Below is our code for initialization:

void Init_ADS7142_PT1000_black_bright(){
	uint8_t ADS_COMMAND[4];
//	ADS7142_SoftwareReset(&hi2c1, ADS7142_I2C_ADDRESS_PT1000);
	/*Calibrate offset values*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_OFFSET_CAL;
	ADS_COMMAND[2] = ADS7142_VAL_TRIG_OFFCAL;
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
	HAL_Delay(10);
	/*Select channel input configuration*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_CHANNEL_INPUT_CFG;
	ADS_COMMAND[2] = ADS7142_VAL_CHANNEL_INPUT_CFG_2_CHANNEL_SINGLE_ENDED;
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
	/*Select mode*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_OPMODE_SEL;
	ADS_COMMAND[2] = ADS7142_VAL_OPMODE_SEL_HIGH_PRECISION_MODE;
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
	/*Select Auto sequence channel enable*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_AUTO_SEQ_CHEN;
	ADS_COMMAND[2] = ADS7142_VAL_AUTO_SEQ_CHENAUTO_SEQ_CH0_CH1;
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
	/*Select High speed oscillator*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_OSC_SEL;
	ADS_COMMAND[2] = ADS7142_VAL_OSC_SEL_HSZ_HSO;
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
	/*Select nCLK parameter*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_nCLK_SEL;
	ADS_COMMAND[2] = 0x60; 				//default value 0x15 = 21 cycles
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
	/*Enable accumulator*/
	ADS_COMMAND[0] = SINGLE_WRITE;
	ADS_COMMAND[1] = ADS7142_REG_ACC_EN;
	ADS_COMMAND[2] = ADS7142_VAL_ACC_EN;
	HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
}

and reading:

for(int i=0;i<loopcount;i++){
		ADS_COMMAND[0] = SET_BIT_ADS7142;
		ADS_COMMAND[1] = ADS7142_REG_START_SEQUENCE;
		ADS_COMMAND[2] = ADS7142_VAL_START_SEQUENCE;
		HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 3, 10);
		for (int k=0;k<3;k++){
			ADS_COMMAND[0] = SINGLE_READ;
			ADS_COMMAND[1] = ADS7142_REG_ACCUMULATOR_STATUS;
			HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 2, 10);
			HAL_I2C_Master_Receive(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, TEST, 1, 10);
//			printf("number: %d\r\n", TEST[0]);
			if (TEST[0] < 16){
				delay_us(20);
			}
			else{
				k=3;
			}
		}
//		HAL_Delay(1);
//		delay_us(20);
		/*Read ACC_0 MSB and LSB*/
		ADS_COMMAND[0] = BLOCK_READ;
		ADS_COMMAND[1] = ADS7142_REG_ACC_CH0_LSB;
		HAL_I2C_Master_Transmit(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, ADS_COMMAND, 2, 10);
		HAL_I2C_Master_Receive(&hi2c1, ADS7142_I2C_ADDRESS_PT1000, TEST, 4, 10);

br,

Pauli

  • Hi Pauli,

    Let me know if I understand this correctly. The issue appears to be the discontinuous jumps that occur in the conversion value randomly. Occasionally, there are little blips that causes a change in 16LSB between conversions, even while the temperature is not changing. 

    Are you able to share a more complete schematic? What is connected to the inputs to the ADC? Is the temperature being measured with a thermistor, and if so, can you share a part number?

    Regards,
    Joel

  • Hi Joel,

    There are no discontinuous jumps per se, but rather the device settles into one of exactly two possible voltage offset levels during bootup. Note that the perfectly flat lines in Figs. 1 and 2 are when the device is powered off and thus not logging. In this instance, the latest value read by the device is logged. The discontinuous jumps seen in the figures are due to powering on of the device after being turned off during test run (Fig. 1 and Fig. 2) via power supply on/off toggle. Notice that the jumps disappear in Fig 3, where the device is constantly powered on without reboots. For temperature measurements in Fig. 3 we use a well known and trusted platinum resistor.

    If we denote the magnitude of the higher voltage offset level as a, and the lower voltage level as b, and the instance of the device settling to a as A, and similarly for B, we can see that according to Figs. 1 and 2 

    a - b ~= 500uV,   and                       (1)

    P(A) = 1 - P(B),

    P(A | T=15degC) = 100%,               (2)

    P(A | T=44degC) ~= 80%,               

    P(A | T=3degC) ~= 5%.

    The input schematic is shown in Fig. 5.

    In Fig. 1 for AD1, OUT1 (same schematic as in Fig. 5) is connected to GND to serve as a known reference and so is node R38-R36. We have also tried changing C11 value to 470pF and 200nF. Changing the input side schematic such as in Fig. 6, as well as changing C5 value (tried values: 220nF, 1uF, 10uF) in Fig. 4 appears to modify the probability function in Eqs 2. Nevertheless, we always observe some nonzero probability for both A and B for some temperature range between (45degC, -60degC).

    Fig. 5. Schematic of AD converter input side. OUT2 is connected to AD2 of the converter.

    Fig. 6. Different use case of ADS7142. The phenomenon remains observable despite changes in ADC input schematic.

    Hope this clarifies,

    Pauli

  • Hi Pauli,

    I think I am grasping the issue. Between two different power cycles, you might see a difference in the measurement, despite performing offset calibration, and the input voltage remaining the same.

    What I am not grasping so well is the difference between the 16 LSB and 500uV figures you stated. At 1.8V, a 16 LSB increment is 7mV. Can you help explain the difference? 500uV would be close to 1 LSB in difference.

    It would also be helpful if you are able to annotate the graphs, and where the issue is occurring. I'm having a hard time following the time scale and relation to ADC codes unfortunately.

    Additionally, we would be happy to meet with you over the phone to help clarify this further and aid more directly. My earliest availability would be September 4th. Jorgen Larsson (field applications engineer) seems to have been made aware of this issue, so we can coordinate some time through him.

    Regards,
    Joel

  • On a more careful read, it is a little bit more clear. The main clarification is the magnitude of the difference between a and b, in LSB and voltage. At this moment, it would seem to be within datasheet spec (±2.9LSB), and this is an unfortunate consequence of that variation in offset calibration. 

    Regards,
    Joel

  • Hi Joel,

    We are using the high resolution mode (16bit resolution) which would bring LSB down to ~27uV at 1v8.

    However, upon revisiting the specifications, the offset error would appear to be +-10LSB in this mode, which does indeed fit into our observed offsets.

    thanks,

    Pauli