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AFE58JD48: ADC Latency using LVDS Outputs

Steve Claffey
Prodigy 140 points

Part Number: AFE58JD48

Tool/software:

Hello E2E Support Team,

The AFE58JD48 datasheet has multiple tables and diagrams related to latency in JESD mode, but I'm struggling to find similar information when using LVDS.  The parameter "NLAT" is shown in Figures 135-137, but doesn't appear to be defined anywhere in the document.  Can you please provide the basic ADC latency as well as any additional cycles for digital processing, down-conversion, and decimation.

I appreciate your assistance.

Steve Claffey

  • 0
    TI__Expert 7725 points

    Did you go through Figure 1. Output Timing Specification of the LVDS Interface >

    Are you using demod feature of the device ? Can you reach out ultrasound_rx-support@list.ti.com for further queries as this device is NDA restricted .