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ADS7865: IBIS Model and clock jitter

Oba
Genius 17295 points
Part Number: ADS7865

Tool/software:

Hello,

My cusotmer has some questions for ADS7865.

1)
Is IBIS model avaialble? If not, do you have any other alternative model to simulate the signal integrity?

2)
They are asking is more detail about CLOCK input specification.
The datasheet just says that the input clock frenquyency range is 1~32MHz.
Is there any other required spec, like jitter, high/low duty, rise/fall time?

3)
Do these parameters like jitter, high/low duty, rise/fall time, clock frequency accuracy, affect to ADC performance?

Regards,
Oba

  • +1
    TI__Genius 14230 points

    Hello Obata-san,

    1. We do not have an IBIS model available for this device, nor could I find models for similar devices. I will keep looking for possible recommendations. 

    2. Generally, a range of 45%-55% clock duty cycle is recommended. Rise and fall times usually are only a concern if the transitions are too fast (such as 0.5ns edges), and cause overshoot/ringing. General practice is to add small value termination to slow edges.

    3. For more complete discussion, I recommend watching the video linked below.

    "How clocking noise affects precision ADC measurements"

    Regards,
    Joel