LMP92066: LMP92066, VDDB and VSSB pins

Part Number: LMP92066

Tool/software:

The VSSB pin must be tied to -5v according to the datasheet for GaN mode (negative FETDRV output).

I would like to use this to drive a low noise FET instead, which has an absolute max of -3.0v VGS.

I understand the OFF condition of the FETDRV output (controlled by the DRVENABLE pin) ties the FETDRV output to VSSB, which in this application cannot be lower than -3.0v.

If I tie the VSSB pin to -3.0v, will the LMP92066 still operate normally with negative FETDRV output?

Also, same question for VDDB (can I operate it at 2.0v instead of 5.0v).