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DAC8750: Injected current at *ALARM pin

Rainer Frisch
Prodigy 10 points
Part Number: DAC8750

Tool/software:

Dear TI team,

please have a look at the schematic snippet.

In our design the +12V power rail is not continuously switched on, while the 3V2 power rail is always on.

If the +12V power rail is switched on, the voltage nDACALM is about 3,2V as expected, given the *ALARM pin of DAC8750 is inactive/high impedance.

If the +12V power rail is switched off (left floating), the voltage at +12V decreases to about 2,0V (due to some leakage currents in other parts of the design), and the voltage at nDACALM decreases to about 2,65V.

If the +12V power rail is switched off and shorted to ground, the voltage at nDACALM is pulled down to approx. 650mV.

 

This lets us assume that the *ALARM pin of DAC8750 surprisingly is clamped by a pn diode to AVDD instead of DVDD.

 

Two questions arise:

  1. Is the assumption concerning the clamping right?
  2. More important: Is it safe to have some current flow from *ALARM pin to AVDD pin of DAC8750?

Best regards

Rainer

  • 0
    TI__Guru 53893 points

    Hi Rainer,

    You are likely violating our abs. maximum limits by biasing a pin beyond the supply value.  You are likely activating the ESD protection diode that can be damaged if this state is continuous.  Would it be possible to add some kind of diode between your 3.2V rail and +12+? that would enable the +12V supply to be sourced by 3.2V if it is ever less-than the 3.2V rail. The ~600mV is a diode forward voltage from the ESD cell.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Prodigy 10 points

    Hi Paul,

    thanks for your prompt answer.

    What does "likely" in "You are likely violating our abs. maximum limits by biasing a pin beyond the supply value." mean? Does it mean that the characteristics of the ESD protection diode can not be specified?

    Please note that DAC8750 datasheet SBAS538D chapter 7.1 gives an absolute maximum rating of 6V to GND for pin *ALARM, which is not violated in our situation.

    We are not going to accept any risk, no matter how small, that the injected current of approx. 320 microamps damages the ESD protection diode. In this case, we would have to leave the *ALARM pin unconnected. We would have to discuss with the firmware team whether some kind of polling the status register could be used instead.

    In our opinion the problem lies in the ESD protection circuit connected to AVDD. We found that the other digital inputs and outputs (DIN, LATCH, SCLK, SDO, CLR) are not involved, so we assume their ESD protection circuits are connected to DVDD. This should be clarified in the datasheet.

    DAC8750 datasheet SBAS538D chapter 10 states "The recommended power-supply sequence is to first have the analog AVDD supply come up, followed by the digital DVDD supply. DVDD can come up first as long as AVDD ramps to at least 5 V within 50 μs. If neither condition can be satisfied, issue a software reset command using the SPI bus after both AVDD and DVDD are stable.".

    We read this as "DVDD without AVDD" is allowed, but power on reset (POR) circuitry no longer works reliably, so issue a software reset.

    We considered to keep the +12V power rail permanently switched on during normal operation, but a problem during power-up remains: obviously the 3V2 power rail is not derived from the +12V power rail, so due to weakly specified start-up times (soft start function of buck converters) the above 50µs condition can not be guaranteed neither.

    Connecting a diode between the 3V2 und +12V power rails will not be possible due to restrictions in other parts of the design.

    Best regards

    Rainer