• State Resolved
  • Replies 1 reply
  • Subscribers 46 subscribers
  • Views 33 views
  • Users 0 members are here
Support feedback
Options
Options
Related

ADS127L18: Datasheet clarification: Start/Stop Control Mode

Randy Openshaw
Intellectual 2781 points
Part Number: ADS127L18

Tool/software:

Hi team,

There is a question about 7.4.5.2 Start/Stop Control Mode of ADS127L18 DS-ADC.

This is the diagram in the data sheet.

 

The question is what happens at the START pin when it goes HIGH again after being LOW?

  1. The ADC starts again with Filter Latency,
  2. OR, The ADC starts again without the Filter Latency.

Which one is the correct operation?

If the answer is 2), then the next FSYNC rising edge, will it be n-th FSYNC delay or related to the time of the rising edge of START?

Best regards,

Randy

  • +1
    TI__Mastermind 46760 points

    Hello Randy,

    The ADC conversion restarts with the filter latency (1. The ADC starts again with Filter Latency)  

    If there is a conversion still in process on START rising edge, then the current conversion will be reset (lost) and the new conversion will start (FSYNC will be forced low if not already low).  After the filter latency period, FSYNC will go high indicating new conversion data are being clocked.

    If there is no conversion in process (FSYNC is low), then you will start a new conversion and FSYNC will remain low for the filter latency period.