Tool/software:
Hello Experts.
I have a JESD204c IP core that supports an 8-lane, 1-channel ADC.
I am considering adapting it to support a 4-lane, 2-channel ADC.
Please tell me how I can customize it.
Alternatively, please tell me which documentation I should read.
The development tool is Vivado.
The FPGA being used is the UltraScale XCKU115-FLVB2104.
Best Regards.