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ADS1285: sync and sps

Massimo Zennaro
Prodigy 10 points
Part Number: ADS1285


Tool/software:

Hello all,

 

I am using three ads1285 to sample two geophone sensors, so I am using sync signal + mux command.

 

My output data is the sinc filter, so, with sps=256 (8KHz) I am getting about 1.2KHz.

 

Our customers asks for “round” numbers, like 1KHz: can I achieve this goal?

  • 0
    TI__Mastermind 47950 points

    Hello Massimo,

    Welcome to the TI E2E community.

    Can you explain what '1.2kHz' refers to?  Is this the useful input signal bandwidth?

    Operating at 8ksps, the -3dB bandwidth of the SINC filter will be 1.632kHz.  You can adjust this frequency by adjusting the clock frequency.

    fCLK=1kHz/1.632kHz*8.192MHz=5.0196MHz

    Also, the ADS1285 SINC filter is only intended to be used with additional external filtering that limits the input bandwidth.  The effective bandwidth of the FIR filter is 0.375 times the data rate.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • 0 in reply to Keith Nicholas
    Prodigy 10 points

    Hello  

    in the following picture you will find some explanation

    we have a shift register (SR) for the activation of spi ss (spi to parallel)

    D0 is the spi clock, followed by SR signals. The last clock "spike" is the command to switch the mux on the other input

    The last two are drdy and sync (pulse mode). In this picture we are activating sync before every other activity but the same happens if we move sync after changing the mux.

    As you can see, between the two drdy there are 817 us = 1.2 KHz (612 Hz per input)

    Our customer wants round numbers, like 500 Hz, or 1 KHz, so the question is: can I achieve this goal?

    Thank you

  • 0 in reply to Massimo Zennaro
    TI__Mastermind 47950 points

    Hello Massimo,

    When you change the input channel, and then send a SYNC pulse, this resets the internal digital filter, which takes more than 1 data rate period to settle (between 5.5 and 6 data rate periods for the SINC filter, but I do not have an exact number).  I think this is the behavior that you observe.

    The ADS1285 typical use case reads multiple conversion results from a single channel, in which case the data rate will be as indicated in the data sheet.  If you change your timing to send the SYNC pulse after the mux change and with an interval of 1000 us, you can achieve an exact 1ksps data rate.  In other words, regardless of the ADC data rate setting, you can control the data rate with the SYNC period.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 10 points

    Hello Keith,

    let's say that I want 1000us.

    If I use a SYNC with that period, the first DRDY# interrupt will happen after 817us from the SYNC, and then, after 125us, there will be another interrupt because I set DR=256 -> 8KHz. This solution does not work for our application.

    Alternative: I assert SYNC after changing the input, but now I must assert SYNC again at 1000-817=183us. Is this the solution?

    Regards

    Massimo

  • +1 in reply to Massimo Zennaro
    TI__Mastermind 47950 points

    Hello Massimo,

    It is true you will get an additional DRDY in the proposed timing.  You would need to either ignore this additional reading, send multiple SYNC pulses, or reduce the CLOCK frequency.

    OPTION 1:  Sending additional SYNC pulse example

    1.  Send SYNC pulse (start 1000us frame)

    2.  Wait for DRDY low

    3.  In less than 125us, read conversion result, update register settings including mux, and send extra SYNC pulse.

    4.  After a total of 1000us from the first SYNC pulse, repeat steps 1-4.

    OPTION 2:  Ignoring additional DRDY

    1.  Send SYNC pulse (start 1000us frame)

    2.  Wait for DRDY low

    3.  Read conversion result, update register settings including mux.

    4.  Ignore next DRDY

    5.  After a total of 1000us from the first SYNC pulse, repeat steps 1-5.

    OPTION 3: Use a lower frequency clock source, for example fCLK=7.3728MHz.  Initial latency will now be 908us, followed by a data period of 139us.

    1.  Send SYNC pulse (start 1000us frame)

    2.  Wait for DRDY low

    3.  In less than 92us (1000us total - 908us latency), read conversion result, update register settings including mux.

    4.  After a total of 1000us from the first SYNC pulse A, repeat steps 1-4.

    Regards,
    Keith