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ADS124S08: ADS124S08 (SPI Interface Issue)

Part Number: ADS124S08
Other Parts Discussed in Thread: ISO7761

Tool/software:

Dear TI Support Team,

We are facing an issue with the ADS124S08 when used as an SPI slave device in our system.

Our SPI bus configuration includes four slave devices:

  • Two ADS124S08 (RTD ADCs)

  • Two AD7490 ADCs

All four devices share the same SPI bus (MOSI, MISO, and SCLK), with individual chip-select (CS) lines controlled by the MCU.

Initially, we used ISO7761DBQR digital isolators between the MCU and the slave devices for galvanic isolation. the salves are connected in the analog isolated section ( Isolator secondary side ). During SPI communication, we observed that the MISO (DOUT/DRDY) line from the ADS124S08 shows a slow rising edge, while all other SPI signals (SCLK, MOSI, CS) appear normal on the oscilloscope. The falling edge of MISO is sharp, but the rising edge is very slow, resulting in invalid data being received by the MCU.

To verify whether the isolators were causing this behavior, we removed the ISO7761 devices and directly shorted the SPI traces between the MCU and the slave devices using jumpers. However, the same slow rising edge behavior remains, even without the isolators in the circuit.

We have confirmed that:

  • Each SPI device has its own dedicated CS line, and only one CS is active at a time.

  • CS timing follows the ADS124S08 datasheet recommendations.

  • MOSI, SCLK, and CS signals are clean and stable.

  • The issue appears only on the MISO line of the ADS124S08. (when I'm trying to communicate with the AD7490 same SPI lines looks clean and the data flow is happening with out issue. 

An oscilloscope waveform of the MISO signal is attached for your reference.
The rising edge shows an exponential transition with an approximate rise time of 43 µs.

Please help us understand what could be causing this behavior and the possible root cause within the ADS124S08 or its configuration.

Thank you for your support.

Best regards,
Manikandan V

  • Hi Manikandan Velayudham,

    Do both ADS124S08s in your system show the same behavior?

    Do multiple boards show the same behavior?

    If you completely disconnect the DOUT pin from the circuit, do you still see this behavior? Remove resistor R450 in your schematic and then probe directly at pin 12 on the ADC. Hopefully this resistor is physically close to the ADC on your PCB to minimize trace capacitance as much as possible

    This looks like you have some capacitance on the bus that is causing this delay.

    -Bryan

  • Hi Bryan,

    Thank you for your update.

    We removed the R450 resistor and probed directly at pin 12 of the ADC, but the same behaviour was still observed. As you mentioned, the R450 resistor is physically placed close to the ADC device.

    Initially, we were operating the device in SPI Mode 1, where this issue occurs. However, when switching to SPI Mode 2, both devices function correctly. As per the datasheet, Mode 1 is the recommended configuration. Could you please suggest how we should proceed further?

    Thanks,
    Manikandan V

  • Hi Manikandan Velayudham,

    The ADC requires that SCLK idles low and that data is captured on the falling edge of SCLK (data is launched on the rising edge). The actual mode name is not important, many controllers refer to the modes differently. 

    So as long as you are adhering to these requirements the ADC communication should operate correctly

    -Bryan