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ADS131M02-Q1: unexpected register values

Lenio Cacula
Genius 16780 points
Part Number: ADS131M02-Q1


My customer is having unexpected readings through SPI. The first byte out of the SPI buffer after reset is the ID (0xFF22), but any subsequent attempts to read from it return 0x0703. Do you have any ideas on how to debug this issue?

  • 0
    TI__Mastermind 23795 points

    Hi Lenio,

    what looks a bit suspicious to me is the glitch in the 2nd frame on MISO in the byte where you read 0x07. Might be good to check the signals in the "analog" domain to make sure the signal levels are correct.
    I am also confused why the first frame reads out 0xFF 0x22. I would have expected 0x22 0xXX. Maybe try to add a bit more delay after RESETn goes high before starting to communicate to see if that changes anything.

    Regards,
    Joachim Wuerker

  • 0 in reply to Joachim Wuerker
    TI__Mastermind 23795 points

    Hi Lenio,

    I just looked up our internal documentation, as this is not documented in the datasheet (yet).
    The 0xFF and 0x22 in the first frame after reset seem correct. However in the 2nd frame I would expect to read 0x22 0xXX. As mentioned above, I would first check the signal levels in the analog domain as a next step.

    Regards,
    Joachim Wuerker

  • 0 in reply to Joachim Wuerker
    TI__Genius 16780 points

    The setup is working now. The cause was the SPI frequency. Inadvertently the clock was 200kHz which caused the issue. Once the frequency was increased to 1MHz, everything works. I can't explain that - there should be no min SPI frequency, except for maintaining the throughput in successive conversions, which was not the case when trying to read the ID. Any thoughts?

  • +1 in reply to Lenio Cacula
    TI__Mastermind 23795 points

    Thanks for the update Lenio.

    I agree, there should be no minimum SCLK frequency requirement. However, by default the SPI timeout is enabled. That could potentially interfere if the SPI frame is too long (time-wise). But based on my calculations, the timeout is much longer than 24bit / 200kHz. So that shouldn't be the issue.

    What is the main clock frequency they are applying to the CLKIN pin?

    Regards,
    Joachim Wuerker