I am Jyothi, an MTech student from India. 3 of my friends and myself are trying to design a Delta Sigma modulator as part of our course work.
We are doing the CMOS implementation of the circuit using HSPICE tool. We have completed the first order modulator design and we are trying to do the second order design now.
We have obtained a bitstream from the second order modulator, which is different from the bitstream obtained from the first order modulator. As per circuit diagram, we expect it to be different, but just wanted to confirm this.
Are we expecting exactly same bitstream as output from both 1st order & 2nd order or will they be different?
Please help us understand the difference between the first & second order modulator outputs.

