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ADS1251: DOUT/DRDY Timing

Noriyuki Takahashi
Genius 11290 points
Part Number: ADS1251


Hi team

 

According to Figure 12, DOUT/DRDY goes to low level after the LSB output. Does the pin always go to low level after the LSB output even if the LSB is high or low?

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  • +1
    TI__Mastermind 47930 points

    Hello Noriyuki Takahashi,

    Not always. 

    1.  If no SCLK is provided during the DOUT Mode, then the MSB value of the conversion result will remain until the next DRDY Mode. 

    2.  If less than 24 SCLKs are provided during DOUT Mode, then the last bit clocked out of the conversion result will remain until the next DRDY Mode.

    If more than 24 SCLKs are provided during DOUT Mode, then the DOUT/DRDY line will stay LOW as shown in Figure 12.

    Here is the exact text from the datasheet in the DOUT/DRDY paragraph:

    Regards,
    Keith Nicholas
    Precision ADC Applications