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ADS131E06: DC Offset in FFT plot

Antenna_Head
Genius 13570 points

Part Number: ADS131E06

Customer has noticed what appears to be a DC offset in the FFT associated with the ADS131E06, see Fig 10 of the datasheet:

My understanding is, this figure shows an FFT of ADC output when ADC input is presented with a pure 0dBFS 60 Hz sine wave (meaning, that sine wave should have zero DC offset).

 

The question is: is there really a spike in the plot at 0 Hz, and if so, what's the nature of it? Is that simply a DC offset of the ADC (which is already characterized by the datasheet, but hasn't been calibrated out when making a plot), or is it some additional DC error induced by the presence of AC signal, kind of a result of nonlinear distortion of the AC signal?

If it's the latter, that means this error has to be proportional to the level of the AC signal (or a certain power thereof...). Do you have some way to quantify it? I'd like to understand the nature of it, and to factor that into our error calculations.

 

 

  • 0
    Prodigy 20 points

    The DC artifact is most likely a side effect of sampling. The number of 60Hz cycles in 16384 samples at 1ksps is 983.04. That extra 0.04 on the end can lead to a DC component. If N=16384 is the number of points in your FFT and fs is your sample rate (currently 1ksps), you may wish to change your sample rate such that at integer number of 60Hz cycles are acquired. For example, N60 is the number of cycles desired, then fs = N*60/N60. If you can increase fs to 1024 Hz I believe you'll find the DC signal disappears.

    Scott

  • +1 in reply to Scott Dattalo
    TI__Mastermind 49355 points

    Hi Antenna_Head,

    Thanks for your patience. 

    This is DC offset and it is ~ -75db which is around 430uv. This is a normal and expected DC offset value. When processing the FFTs, you can compute the DC voltage waveform average, and adjust the whole waveform so that the offset is 0. This would eliminate the 0hz DC bin, which helps in calculations, but typically it’s not a problem to include it in a plot.

    This is not related to coherent sampling, coherent signals can have DC offset error.

    BR,

    Dale