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TX75E16: Regarding pulser output timing variation between ICs

Part Number: TX75E16

When generating pulser outputs, we observe a timing deviation of approximately ±6 ns between chips in the pulser output timing referenced to the TR_BF_SYNC pin.
Is this level of timing variation considered normal?

Since a 160 MHz clock is used, the timing variation corresponds to one clock cycle.

As shown in the first image, the TR_BF_SYNC pin timing is identical. However, as shown in the second image, there is a timing difference in the outputs from the chips.

We would appreciate your prompt response. Thank you.

BF.gif pulser.gif